基于优化BPNN的FPGA内嵌高速接口总抖动预测方法

doi:10.16180/j.cnki.issn1007-7820.2025.02.009

电子科技 ›› 2025, Vol. 38 ›› Issue (2): 70-77.doi: 10.16180/j.cnki.issn1007-7820.2025.02.009

基于优化BPNN的FPGA内嵌高速接口总抖动预测方法

叶翔宇¹(), 林晓会², 丁江乔¹, 解维坤²

1.南京信息工程大学电子与信息工程学院,江苏南京 211800
2.中国电子科技集团公司第58研究所,江苏无锡 214072

收稿日期:2023-08-10 修回日期:2023-09-02 出版日期:2025-02-15 发布日期:2025-01-16
通讯作者: 叶翔宇(1997-),男, E-mail:1848807072@qq.com,硕士研究生。研究方向:大规模数字集成电路测试。
作者简介:林晓会(1995-),男,工程师。研究方向:大规模数字集成电路测试。
丁江乔(1987-),男,博士,副教授。研究方向:电磁场与微波技术。
基金资助:
装备预研项目(31517040401)

Total Jitter Prediction Method of FPGA Embedded High-Speed Interface Based on Optimized BPNN

YE Xiangyu¹(), LIN Xiaohui², DING Jiangqiao¹, XIE Weikun²

1. School of Electronic and Information Engineering,Nanjing University of Information Science and Technology, Nanjing 211800,China
2. The 58th Research Institute,China Electronics Technology Group Corporation, Wuxi 214072,China

Received:2023-08-10 Revised:2023-09-02 Online:2025-02-15 Published:2025-01-16
Supported by:
Project of Equipment Pre-Research(31517040401)

摘要/Abstract

摘要：

针对ATE(Automated Test Equipment)无法直接测试出FPGA(Field-Programmable Gate Array)内嵌高速接口总抖动的问题,文中提出了一种基于优化BPNN(Back Propagation Neural Network)对高速接口进行总抖动预测的方法。利用GA(Genetic Algorithm)较强的全局搜索能力优化BPNN的初始权重和寻参过程,组成了GA_BP神经网络,提高了预测总抖动的准确率。利用MATLAB软件建立GA_BP总抖动预测模型,对筛选后的抖动数据进行预测优化。实验结果表明,与未优化的BP神经网络和传统Elman神经网络预测模型相比,GA_BP预测模型的均方误差分别下降了75.5%、88.0%,迭代次数分别减少了68.0%、59.8%,说明GA_BP模型预测准确率和迭代效率更高,可被应用于ATE中进行总抖动量产测试。

关键词: 高速接口, 总抖动预测, 优化BP神经网络, 遗传算法, Grubbs准则, FPGA, 均方误差, 量产测试

Abstract:

In view of the problem that ATE(Automated Test Equipment) can not measure the total jitter of FPGA(Field-Programmable Gate Array) embedded high-speed interface directly, this study presents a method to predict the total jitter of high-speed interface based on optimized BPNN(Back Propagation Neural Network). The GA-BP neural network is formed to optimize the initial weight and parameter seeking process of BPNN using the strong global search ability of GA(Genetic Algorithm), and improve the accuracy of predicting the total jitter. The GA_BP total jitter prediction model was constructed using MATLAB software to predict and optimize the screened jitter data. The experimental results show that compared with the non-optimized BP neural network and the traditional Elman neural network prediction model, the mean square error of the GA_BP prediction model is declined by 75.5% and 88.0%, and the number of iterations is reduced by 68.0% and 59.8%, respectively. It indicates that the proposed GA_BP model has higher prediction accuracy and iteration efficiency, and can be applied to total jitter production test in ATE.

Key words: high-speed interface, total jitter prediction, optimized BP neural network, genetic algorithm, Grubbs criterion, FPGA, mean square error, production test

中图分类号:

TP27

叶翔宇, 林晓会, 丁江乔, 解维坤. 基于优化BPNN的FPGA内嵌高速接口总抖动预测方法[J]. 电子科技, 2025, 38(2): 70-77.

YE Xiangyu, LIN Xiaohui, DING Jiangqiao, XIE Weikun. Total Jitter Prediction Method of FPGA Embedded High-Speed Interface Based on Optimized BPNN[J]. Electronic Science and Technology, 2025, 38(2): 70-77.

图/表 11

图1

图2

图3

图4

图5

图6

表1

图7

图8

图9

表2

参考文献 18

[1]	霍卫涛, 邵刚, 李攀, 等. 高速SerDes抖动成因及其测试方法分析[J]. 计算机光盘软件与应用, 2012, 15(2):67-68.
	Huo Weitao, Shao Gang, Li Pan, et al. Analyse of the cause of SerDes jitter and testing methods[J]. Computer CD Software and Applications, 2012, 15(2):67-68.
[2]	杨洋, 沈小青, 顾卫红, 等. 抖动测试系统的构建与应用技术研究[J]. 计算机测量与控制, 2015, 23(8):2640-2642.
	Yang Yang, Shen Xiaoqing, Gu Weihong, et al. Research for time-base verification method based on delay function of digital oscilloscope[J]. Computer Measurement and Control, 2015, 23(8):2640-2642.
[3]	谢翰威, 翁雷, 史晨迪. 一种高速Serdes接口测试的ATE设计[J]. 环境技术, 2019, 37(1):101-106.
	Xie Hanwei, Weng Lei, Shi Chendi. ATE design for high speed serdes interface test[J]. Environmental Technology, 2019, 37(1):101-106.
[4]	杜涛, 阮爱武, 汪鹏, 等. 一种基于BP神经网络的集成电路PHM模型[J]. 计算机工程与科学, 2017, 39(1):55-60.
	Du Tao, Ruan Aiwu, Wang Peng, et al. A prognostics and health management model for integrated circuits based on back propagation neural network[J]. Computer Engineering and Science, 2017, 39(1):55-60.
[5]	侯旺超, 梁华国, 宋钛, 等. 联合mRMR算法和BP神经网络的集成电路测试方法[J]. 微电子学, 2021, 51(5):766-772.
	Hou Wangchao, Liang Huaguo, Song Tai, et al. An integrated circuit test method based on mRMR algorithm and BP neural network[J]. Microelectronics, 2021, 51(5):766-772.
[6]	Ou N, Farahmand T, Kuo A, et al. Jitter models for the design and test of Gbps-speed serial interconnects[J]. IEEE Design and Test, 2004, 21(4):302-313.
[7]	张昌骏. 信号完整性分析基础系列-时钟的抖动测量与分析[J]. 国外电子测量技术, 2010, 29(2):7-11.
	Zhang Changjun. Basic series of signal integrity analysis-Clock jitter measurement and analysis[J]. Foreign Electronic Measurement Technology, 2010, 29(2):7-11.
[8]	王东旅. 高速串行通信中时间抖动的若干问题研究[D]. 合肥: 中国科学技术大学,2012:1-12.
	Wang Donglü. Study on some lssues of jitter in high-speed serial communication[D]. Hefei: University of Science and Technology of China,2012:1-12.
[9]	华莉, 杨俭, 袁天辰, 等. 基于VMD和BP神经网络的轨道病害诊断方法[J]. 电子科技, 2022, 35(4):40-46.
	Hua Li, Yang Jian, Yuan Tianchen, et al. Track disease diagnosis method based on VMD and BP neural network[J]. Electronic Science and Technology, 2022, 35(4):40-46.
[10]	张崇崇, 黄亚宇. GA-BP神经网络对片烟结构的预测研究[J]. 电子科技, 2022, 35(6):35-42.
	Zhang Chongchong, Huang Yayu. A GA-BP neural network for predicting the structure of leaf tobacco[J]. Electronic Science and Technology, 2022, 35(6):35-42.
[11]	吴凯枫, 张立新, 阚希, 等. 基于改进GA-BP神经网络的压力传感器校准方法[J]. 国外电子测量技术, 2023, 42(2):38-44.
	Wu Kaifeng, Zhang Lixin, Kan Xi, et al. Pressure sensor calibration method based on improved GA-BP neural network[J]. Foregin Electronic Measurement Technology, 2023, 42(2):38-44.
[12]	Holland J H. Adaptation in natural and artificial systems[M].1st ed.ed. Cambridge: MIT Press,1975:6-12.
[13]	Bjeli M, Stanojevi M, Pavlovi D S, et al. Microphone array geometry optimization for traffic noise analysis[J]. Journal of the Acoustical Society of America, 2017, 141(5):3101-3104. doi: 10.1121/1.4982694 pmid: 28599572
[14]	苏宇逍. 基于GA的BP神经网络在多目标优化中的应用[J]. 电子科技, 2015, 28(6):51-53,56.
	Su Yuxiao. Application of BP neural network based on genetic algorithm in multi-objective optimization[J]. Electronic Science and Technology, 2015, 28(6):51-53,56.
[15]	陈明亮, 陈成新, 古建平. 一种基于直方图的自适应分段线性变换法[J]. 国外电子测量技术, 2015, 34(2):36-38.
	Chen Mingliang, Chen Chengxin, Gu Jianping. Adaptive piecewise linear transform method based on histogram[J]. Foreign Electronic Measurement Technology, 2015, 34(2):36-38.
[16]	郝旭娥, 沈大伟, 张艳兵, 等. 基于格拉布斯准则的膛压测试仪校准数据拟合方法[J]. 传感器与微系统, 2022, 41(9):61-64,76.
	Hao Xu'e, Shen Dawei, Zhang Yanbing, et al. Fitting method for calibration data of chamber pressure tester based on Grubbs criterion[J]. Transducer and Microsystem Technologies, 2022, 41(9):61-64,76.
[17]	刘啸滨, 郭兵, 沈艳, 等. 嵌入式软件体系结构级能耗建模方法[J]. 软件学报, 2012, 23(2):230-239.
	Liu Xiaobin, Guo Bing, Shen Yan, et al. Embedded software energy modeling method at architecture level[J]. Journal of Software, 2012, 23(2):230-239.
[18]	Fu Z, Avramidis S, Zhao J, et al. Artificial neural network modeling for predicting elastic strain of white birch disks during drying[J]. European Journal of Wood and Wood Products, 2017, 75(6):949-955.

节点数S	MSE	迭代次数
4	0.183 569	29
5	0.178 967	35
6	0.165 894	39
7	0.156 375	42
8	0.134 827	44
9	0.119 563	39
10	0.107 652	33
11	0.106 876	46
12	0.106 751	50
13	0.106 388	52

模型	相关系数R²	MSE	MAE	RMSE	迭代次数
GA_BP	0.969 3	0.107 3	0.273 6	0.327 5	41
未优化的BP	0.874 9	0.437 3	0.619 3	0.661 2	128
传统Elman	0.744 2	0.893 9	0.907 2	0.945 4	102

基于优化BPNN的FPGA内嵌高速接口总抖动预测方法

Total Jitter Prediction Method of FPGA Embedded High-Speed Interface Based on Optimized BPNN

RichHTML

PDF (PC)

赞

可视化

摘要/Abstract

引用本文

使用本文

图/表 11

参考文献 18

相关文章 15

Metrics

本文评价

推荐阅读 0

[1]	江少祥, 禹胜林, 马金龙, 吴楚彬. 应用于Flash型FPGA的正高压电荷泵[J]. 电子科技, 2025, 38(3): 75-81.
[2]	刘正强, 洪徐健, 孙卫红. 基于FPGA高速Serdes接口的收发模块握手协议设计[J]. 电子科技, 2025, 38(3): 82-87.
[3]	傅僈喃, 陈苏婷, 解维坤, 林晓会. 基于改进EK算法的FPGA内部互联自动化测试方法[J]. 电子科技, 2025, 38(2): 10-16.
[4]	方应李, 方玉明. 基于FPGA的AES和ECC算法图像加密[J]. 电子科技, 2024, 37(6): 92-97.
[5]	丁凯,饶俊峰. MHz高压脉冲电源的研究[J]. 电子科技, 2024, 37(2): 69-75.
[6]	兰唯,韩延喆,扈啸. 基于FPGA的千兆以太网端口通信设计[J]. 电子科技, 2024, 37(1): 48-54.
[7]	傅一钊,李孜. 多级谐振充电的Marx脉冲源研究[J]. 电子科技, 2024, 37(1): 9-16.
[8]	周彪,张帅,闫登辉,林志成,王建. K波段宽带宽角低副瓣圆极化稀疏阵[J]. 电子科技, 2023, 36(9): 29-34.
[9]	胡逸飞,包梓群,包晓安. 一种基于改进遗传算法的动静态负载均衡算法[J]. 电子科技, 2023, 36(9): 79-85.
[10]	周彪,张帅,张德训,林志成,王建. W波段宽带宽角低副瓣类喇叭天线稀布阵[J]. 电子科技, 2023, 36(9): 8-14.
[11]	曹红芳,王晓蕾,杜高明,李桢旻,倪伟. 基于通道差值模型的导向滤波去雾算法及其FPGA实现[J]. 电子科技, 2023, 36(8): 1-6.
[12]	张大桂,周志峰,张怡. 基于遗传算法的平面麦克风阵列构型优化方法[J]. 电子科技, 2023, 36(7): 24-31.
[13]	卞大鹏,王叶婷,彭雅欣,汤皓泉. 基于仿真优化的甲板作业站位选择指标策略研究[J]. 电子科技, 2023, 36(5): 88-94.
[14]	罗欣,冯武,孙卫杰,刘马良. 基于FPGA的多功能阵列信号处理系统设计[J]. 电子科技, 2023, 36(3): 1-6.
[15]	赵英潇,苏阳. 基于FPGA的多通道雷达数据回放系统设计[J]. 电子科技, 2023, 36(2): 1-7.