›› 2010, Vol. 23 ›› Issue (11): 113-115.

• 论文 • 上一篇    下一篇



  1. (西安电子科技大学 电子工程学院,陕西 西安 710071)
  • 出版日期:2010-11-15 发布日期:2010-12-23
  • 作者简介:童庆为(1986-),男,硕士研究生。研究方向:信号处理。

Hardware Implementation of FFT Algorithm Based on FPGA

 TONG Qing-Wei, CHEN Jian-Chun   

  1. (School of Electronic Engineering,Xidian University,Xi'an 710071,China)
  • Online:2010-11-15 Published:2010-12-23


设计了一种基于FPGA的1 024点16位FFT算法,采用了基4蝶形算法和流水线处理方式,提高了系统的处理速度,改善了系统的性能。提出了先进行前一级4点蝶形运算,再进行本级与旋转因子复乘运算的结构,合理地利用了硬件资源。对系统划分的各个模块使用Verilog HDL进行编码设计。对整个系统整合后的代码进行功能验证之后,采用Quartus Ⅱ与Matlab进行联合仿真,其结果是一致的。该系统既有DSP器件实现的灵活性又有专用FFT芯片实现的高速数据吞吐能力,在数字信号处理领域有广泛应用。

关键词: 现场可编程门阵列, 快速傅立叶变换, 基4蝶形运算, 硬件描述语言


A 1024-point FPGA-based 16-bit FFT algorithm is designed which is using the Radix-4 butterfly algorithm and pipeline operations to enhance the processing speed and improve the performance.A structure that the butterfly operation of the first level is made before the complex multiplication of the rotation factor of the second level is proposed,which is using of the hardware resources reasonably.The system is divided into several modules in Verilog HDL.After testing the function of system,the results ofjoint simulation of QuartusⅡ and Matlab is consistent.The system not only achieves the flexibility of DSP devices but also has the high-speed data throughput of dedicated FFT chips.This algorithm can be
widely used in the field of digital signal processing.

Key words: FPGA;FFT;radix-4 butterfly algorithm;Verilog HDL


  • TP301.6