Electronic Science and Technology ›› 2021, Vol. 34 ›› Issue (9): 30-35.doi: 10.16180/j.cnki.issn1007-7820.2021.09.006

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Design of a Sampling System Based on Four-Channel ADC Chip Time-Interleaved Sampling

LEI Wen1,LI Jingyu2   

  1. 1. Naval Representative's Office in Xiangtan,Xiangtan 411100,China
    2. College of Advanced Interdisciplinary Studies, National University of Defense Technology,Changsha 410073,China
  • Received:2020-05-09 Online:2021-09-15 Published:2021-09-08
  • Supported by:
    National Natural Science Foundation of China(61571449)


Signal sampling system with high speed, high precision and wideband is an important part of wideband imaging radar. For the problem that the sampling rate of single high-precision ADC chip cannot meet the direct intermediate frequency sampling of wideband imaging radar, the method of multiple ADC chips time-interleaved sampling is adopted in this study, which improves the sampling rate of the system under the condition of keeping the sampling accuracy unchanged. Four ADC12DJ3200 chips with a sampling rate of 3.4 GS·s-1 are used to design a wideband TIADC system with a total sampling rate of 13.6 GS·s-1, and the number of quantization bits is 12 bit. The test results show that in the frequency range of 440~6 140 MHz, the effective number of bits and spurious free dynamic range of the system are more than 7.2 bit and 51 dB, respectively.

Key words: ADC, TIADC, wideband radar, digital receiver, sampling system, circuit design, wideband signal, sampling performance

CLC Number: 

  • TN98