基于FPGA的声学相机音频采集系统设计

doi:10.16180/j.cnki.issn1007-7820.2025.04.010

Abstract

Abstract:

In view of the low signal acquisition efficiency and high hardware logic complexity of the acoustic camera audio acquisition scheme based on FPGA(Field Programmable Gate Array), an efficient acoustic camera audio acquisition system design scheme based on FPGA is proposed in this study. Inside the FPGA, a cascaded and efficient decoding filter is utilized to decode the multi-channel PDM(Pulse Density Modulation) audio signal stream to reduce the workload of hardware calculation. FPGA collects the PDM data stream of multi-channel MEMS(Micro Electro Mechanical Systems) microphones for bit splicing and complementing into signed numbers. Each frame data packet is pipelinized in each cascade filter through AXI4-Stream bus protocol. The entire decoding process runs in parallel to simplify hardware logic complexity. The decoded data is transmitted over Gigabit Ethernet using UDP(User Datagram Protocol) to ensure real-time transmission. Simulation and experimental results verify the feasibility and effectiveness of the proposed scheme. The data decoding delay is less than 200 μs, the hardware logic resource occupancy is less than 60%, the data packet loss rate is 0%, which demonstrate that the proposed method has high real-time performance and strong stability and can provide more beneficial enlightenment for the design of FPGA-based acoustic camera.

Key words: FPGA, acoustic camera, PDM audio decoding, MEMS microphone, sound source location, AXI4-Stream bus protocol, gigabit ethernet, filter design

CLC Number:

TP23

WEN Jinlong, SHI Wei, HU Dingyu, LIAO Aihua. Design of Audio Acquisition System for Acoustic Camera Based on FPGA[J].Electronic Science and Technology, 2025, 38(4): 66-72.

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References 18

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MEMS声学性能参数	典型值
输入时钟信号FCLK/MHz	1.20~3.25
声学过载点AOP/dB	122.5
信噪比SNR/dB	64
总谐波失真THD	0.2%~0.7%

Design of Audio Acquisition System for Acoustic Camera Based on FPGA

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