›› 2011, Vol. 24 ›› Issue (12): 35-.

• Articles • Previous Articles     Next Articles

Verification of I2C Bus Model Using SystemVerilog

 YAN Tao, SHEN Zhi-Fei, YI Mao-Xiang, MEI Chun-Lei   

  1. (School of Electronic Science and Applied Physics,Hefei University of Technology,Hefei 230009,China)
  • Online:2011-12-15 Published:2011-12-16

Abstract:

A design for IP verification of I2C bus module based on  Systemverilog is introduced.The verification design based on the object-oriented method can be easily reused.The structure of Systemverilog is analyzed and I2C bus protocol is introduced.After that,the paper focuses on the design of the affair generator and drive in the verification environment.

Key words: systemverilog;I2C bus;generation;drive

CLC Number: 

  • TN407