›› 2011, Vol. 24 ›› Issue (12): 66-.

• Articles • Previous Articles     Next Articles

Design and Implementation of IP Core for Stepping Motor Controller Based on Nios II

 LIU Hong-Ming, GE Gunang-Ying   

  1. (School of Physics Science and Information Technology,Liaocheng University,Liaocheng 252059,China)
  • Online:2011-12-15 Published:2011-12-16

Abstract:

According to the Nios II's Avalon bus specification,the paper introduces the design of a stepping motor controller IP core.The method uses collaborative design of software and hardware of custom components to achieve stepping motor controller IP core.The controller agrees with the read and write transmission timing of the Avalon bus and has complete driving capacity.The simulation results show that the IP core has good reusability and efficiency and can be shared.

Key words: SOPC;IP core;FPGA;stepping motor controller

CLC Number: 

  • TM571