›› 2012, Vol. 25 ›› Issue (10): 70-.
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XING Kai-Yu, CAO Xiao-Man, FANG Huo-Neng
Online:
Published:
Abstract:
A certain high speed and large capacity storage system is designed using NAND Flash K9WBG08U1M as its storage media.Though NAND Flash is considered to be one of the most reliable storage medium,there is still small probability of single bit error.To detect and correct this error,an Error Correcting Code (ECC) algorithm system is designed and implemented in the Xilinx FPGA XC4VLX80,which is used as the core control chip of the storage system.Through comparing the two ECC codes calculated from the stored data during read and write operation,bit error can be located and corrected,and the correcting capability is 1 bit/4 kB.The ECC algorithm has the advantages of good correcting capability,less resources requirement and high speed.The design has already been applied in a satellite system to ensure the reliability of the storage system.
Key words: FPGA;NAND flash;ECC algorithm
CLC Number:
XING Kai-Yu, CAO Xiao-Man, FANG Huo-Neng. ECC Design Based on FPGA and NAND Flash Memory[J]., 2012, 25(10): 70-.
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URL: https://journal.xidian.edu.cn/dzkj/EN/
https://journal.xidian.edu.cn/dzkj/EN/Y2012/V25/I10/70
[1]Samsung Electronics Corpration.NAND Flash ECC Algorithm[M].Korea:Samsung Electronics Corpration,2004.
[2]贾红恩,刘瑞竹,罗丰.基于固态存储器的ECC算法分析及实现[J].电子科技,2009,22(10):43-46.
[3]Samsung Electronics Corpration.K9WBG08U1M Flash Memory[M].Korea:Samsung Electronics Corpration,2007.
[4]Xilinx Corporation.Virtex-4 FPGA User Guide[M].USA:Xilinx Corporation,2008.
[5]夏宇闻.Verilog数字系统设计教程[M].北京:北京航空航天大学出版社,2003.
[6]王诚,薛小刚,钟信潮.FPGA/CPLD设计工具——Xilinx ISE 使用详解[M].北京:人民邮电出版社,2005.
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