›› 2012, Vol. 25 ›› Issue (10): 70-.

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ECC Design Based on FPGA and NAND Flash Memory

 XING Kai-Yu, CAO Xiao-Man, FANG Huo-Neng   

  1. (School of Electronic Engineering,Xidian University,Xi'an 710071,China)
  • Online:2012-10-15 Published:2012-11-29


A certain high speed and large capacity storage system is designed using NAND Flash K9WBG08U1M as its storage media.Though NAND Flash is considered to be one of the most reliable storage medium,there is still small probability of single bit error.To detect and correct this error,an Error Correcting Code (ECC) algorithm system is designed and implemented in the Xilinx FPGA XC4VLX80,which is used as the core control chip of the storage system.Through comparing the two ECC codes calculated from the stored data during read and write operation,bit error can be located and corrected,and the correcting capability is 1 bit/4 kB.The ECC algorithm has the advantages of good correcting capability,less resources requirement and high speed.The design has already been applied in a satellite system to ensure the reliability of the storage system.

Key words: FPGA;NAND flash;ECC algorithm

CLC Number: 

  • TN79