Abstract:

FIR filter design is divided into two parts:the calculation of the filter coefficients and the filter structure design.To better illustrate the flexibility of using FPGA to achieve FIR,this paper uses a multi-order Serial FIR filter instance,and gives the timing and functional description of the source code and related modules.MATLAB and QUARTUSII simulations verify the correctness of the FPGA hard filter.

Key words: FPGA;FIR digital filter;MATLAB;simulation