›› 2013, Vol. 26 ›› Issue (6): 31-.

• Articles • Previous Articles     Next Articles

A Method for Enhancing the Testability of Telemetry Signal Processor

ZHU Dangjie,JIANG Xuedong   

  1. (Communication Technology Research Institute,China Airborne Missile Academy,Luoyang 471009,China)
  • Online:2013-06-15 Published:2013-06-04

Abstract:

The design principle of telemetry signal processor is introduced.A method by introducing an additional hardware circuit and taking advantage of the rest logic resource in FPGA is given to enhance the fault detection rate and test coverage of telemetry signal processor hanging on the aerobat.BIT of telemetry signal processor is realized by designing self-checking module based on this method.

Key words: FPGA;BIT;testability

CLC Number: 

  • TN702