Abstract:

In view of the poor dynamic response of digital and analog controller chip,the digital current step-down model of change is analyzed.Reasonable slope compensation can result in current loop stability and a controlled current source.Voltage sampling points will determine the time delay of the system,guaranteeing that the sampling information in the shortest possible time be used in digital systems.Simulation and experimental results of frequency domain and time domain validate the feasibility of the mathematical model.

Key words: buck converter;digital control;current mode control;time delay