›› 2014, Vol. 27 ›› Issue (5): 127-.

• Articles • Previous Articles     Next Articles

Study and Implementation of Rationality Verification of SysML State Chart

YU Xiaofeng,WANG Lisong   

  1. (College of Computer Science & Technology,Nanjing University of Aeronautics & Astronautics,Nanjing 210016,China)
  • Online:2014-05-15 Published:2014-05-14

Abstract:

The formal semantics of SysML enables system rationality model validation before the generation of the target system,which reduces the target system test cycle.The SysML state diagram is used to represent the behavior of the system model,and behavioral model verification is performed in terms of architecture and business needs.The state diagram architecture is authenticated in accordance with the standard Semantic specifications and performance requirements.On the other hand,with the correctness of the architecture assured,the behavior of the state diagram objects is available by the implementation of the state diagram with action specification language.And then the business requirements are verified by judging whether the behavior is the desired one.The effectiveness and feasibility of this method is verified by experiments.

Key words: state chart;architecture;performance requirements;business requirements

CLC Number: 

  • TP311