›› 2015, Vol. 28 ›› Issue (7): 41-.
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JIAO Shuhong,CHENG Rentao
Online:
Published:
Abstract:
This paper briefly introduces the characteristics and operating principles of DDR3 and the structure of the controller.A design of the controller is implemented on the Virtex-6 series of FPGA chip using the MIG software of Xilinx.The ISim simulation results verify the feasibility of the design.
Key words: FPGA;DDR3 SDRAM controller;MIG;ISim
CLC Number:
TN79
JIAO Shuhong,CHENG Rentao. Design of a DDR3 Controller Based on FPGA[J]., 2015, 28(7): 41-.
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https://journal.xidian.edu.cn/dzkj/EN/Y2015/V28/I7/41
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