Electronic Science and Technology ›› 2019, Vol. 32 ›› Issue (4): 6-10.doi: 10.16180/j.cnki.issn1007-7820.2019.04.002

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Research on Fault Tree Analysis Method for Hybrid Uncertainties Using Stochastic Logic Implemented on Field-programmable Gate Arrays

LI Mengfan,ZOU Zihao,SHU Fandi   

  1. School of Electrical Engineering & New Energy,China Three Gorge University,Yichang 443002,China
  • Received:2018-03-18 Online:2019-04-15 Published:2019-03-27
  • Supported by:
    National Natural Science Foundation of China(51507091)


This paper proposed a fault tree analysis method based on stochastic logic,which utilized hybrid fault tree analysis (HFTA) to take into account both objective and subjective uncertainties. In the proposed method, each fault tree gate was translated to its corresponding stochastic logic module and then was implemented on a field programmable gate array (FPGA). The accuracy and performance of the proposed method were compared with the conventional method In the case that the a-clipping confidence level was equal to 0. Because the top event probability cumulative distribution function is basically compatible with the conventional hybrid method,it can be considered that the accuracy of the new method results and the conventional hybrid method is basically the same.

Key words: stochastic logic, field programmable gate arrays, FTA, probability distributions, monte carlo method, VHDL

CLC Number: 

  • TP30