›› 2012, Vol. 25 ›› Issue (6): 47-.

• Articles • Previous Articles     Next Articles

Study of on-Chip Network Communication Architecture for the Multi-core Processors System

 WANG Jian, ZHANG Lei, ZHAO Zhong-Hui, WANG Shao-Xuan, CHEN YA-Ning   

  1. (Suzhou R & D center,214 Institute of China Weaponry Industries,Suzhou 215163,China)
  • Online:2012-06-15 Published:2012-08-23


In recent years,Multi-core architectures have been the mainstream design of the processors as well as the mainstream processing platform of various communication and multimedia applications.The communication structure becomes one of the core technologies of Multi-core processors.The efficiency of communication between the inter-core is the key indicator of Multi-core processor performance.There are three main types of communication architecture:Bus system,Cross-bar network and On-Chip Network.Bus structure designs have the advantages of convenience,low hardware consumption and low cost.Cross-bar design is  suitable for the switching network structure of building large-capacity systems.On-Chip Network is larger and more sophysicated on-chip network,which can completely solve the problem of Multi-core architecture and therefore becomes one of the most promising solutions for the Multi-core system.The paper discusses the principle,system structure and function of the NOC communication architecture and presents the realization of some units.

Key words: multi-core processor;inter-core communication;bus;cross-bar;on-chip network

CLC Number: 

  • TN402