›› 2013, Vol. 26 ›› Issue (1): 52-.

• Articles • Previous Articles     Next Articles

Design of a DDR SDRAM Controller Based on FPGA

CHEN Genliang,XIAO Lei,ZHANG Jian   

  1. (1.College of Electronic Science and Applied Physics,Hefei University of Technology,Hefei 230009,China;2.College of Physics and Electronic Information Engineering,Wenzhou University,Wenzhou 325035,China)
  • Online:2013-01-15 Published:2013-03-08

Abstract:

The basic working characteristics and timing analysis of DDR SDRAM are studied,and a universal DDR SDRAM controller based on FPGA is designed.The design function simulation is performed under Modelsim,and testing and verification of the hardware are also completed under the FPGA.Simulation results show that the controller can realize read-write control over DDR SDRAM with high read-write efficiency and simple interface circuit.

Key words: DDR SDRAM;controller;field programmable gate array (FPGA)

CLC Number: 

  • TN79