[1] Eric B. Signal Integrity-Simplified [M]. New Jersey: Prentice Hall PTR, 2003: 436-443.
[2] Palit A K, Anheier W, Meyer V. Modeling and Analysis of Crosstalk Coupling Effect on the Victim Interconnect Using the ABCD Network Model[C]//19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Cannes: IEEE, 2004: 174-182.
[3] Palit A K, Anheier W, Schloeffel J. A New, Flexible and Very Accurate Crosstalk Fault Model to Analyze the Effects of Coupling Noise Between the Interconnects on Signal Integrity Losses in Deep Submicron Chips[C]//Proceedings of 14th IEEE-Asian Test Symposium. Calcutta: IEEE, 2005: 22-27.
[4] Banerjee K, Mehrotra A. Analysis of On-chip Inductance Effects for Distributed RLC Interconnects[J]. IEEE Trans on CAD of Integrated Circuits and Systems, 2002, 21(8): 904-915.
[5] Palit A K,  Anheier W. Estimation of Signal Integrity Loss through Reduced Order Interconnect Model[C]//Proc IEEE-SPI. Siena: IEEE, 2003: 163-166.
[6] Engin A E, Bharath K, Swaminathan M. Multilayered Finite-difference Method (MFDM) for Modeling of Package and Printed Circuit Board Planes [J]. IEEE Trans on Electromagn Compat, 2007, 49(2): 441-447.
[7] Joo S H, Kim D Y, Lee H Y. A S-bridged Inductive Electromagnetic Bandgap Power Plane for Suppression of Ground Bounce Noise [J]. IEEE Microw Wireless Compon Lett, 2007, 17(10): 487-489.
[8] Sabbagh M A E,  Mansour R R. Ultra-wide Suppression Band of Surface Waves Using Periodic Microstrip-based Structures [J]. IEEE Trans on Microwave Theory Tech, 2008, 56(3): 671-683.
[9] Miller J R, Blando G, Novak I. Crosstalk Due to Periodic Plane Cutouts [DB/OL]. [2009-04-16]. http://www.designcon.com/infovault/paper.asp?PAPER_ID=410.
[10] Hall S H, Hall G W, McCall J A. High-speed Digital System Design: a Handbook of Interconnect Theory and Design Practices [M]. New York: John Wiley ＆ Sons, 2000: 117-120.
[11] Johnson H, Graham M. High-speed Digital Design: a Handbook of Black Magic [M]. New Jersey: Prentice Hall PTR, 1993: 194-196.