J4 ›› 2012, Vol. 39 ›› Issue (6): 136-141.doi: 10.3969/j.issn.1001-2400.2012.06.022

• 研究论文 • 上一篇    下一篇



  1. (1. 西安邮电大学 陕西省通信专用集成电路设计工程研究中心,陕西 西安  710121;
    2. 西安电子科技大学 微电子学院,陕西 西安  710071)
  • 收稿日期:2011-07-28 出版日期:2012-12-20 发布日期:2013-01-17
  • 通讯作者: 佟星元
  • 作者简介:佟星元(1984-),男,讲师,博士,E-mail: mayxt@126.com.
  • 基金资助:


Jitter and ringing cancellation techniques for signal integrity design

TONG Xingyuan1;ZHU Zhangming2;YAN Yintang2;KONG Liang2   

  1. (1. Communication ASIC Design Eng. Center, Xi'an Univ. of Posts & Telecommunications, Xi'an  710121, China;
    2. School of Microelectronic, Xidian Univ., Xi'an  710071, China)
  • Received:2011-07-28 Online:2012-12-20 Published:2013-01-17
  • Contact: TONG Xingyuan



关键词: 信号完整性, 抖动, 预加重电路, 振铃, 阻抗匹配


This paper focus mainly on the research on jitter and ringing for signal integrity design. To optimize the jitter caused by ISI (ISI: Inter-Symbol Interference) during high speed signal transmission, a novel current-mode pre-emphasis circuit is presented. Compared with the traditional structure, this novel circuit not only improves the operation speed by pre-emphasizing in both the posedge and negedge of the signal, but also reduces the circuit complexity. Furthermore, with the consideration of the bonding wire model and the chip load, a technique based on impedance matching is proposed to reduce the ringing in LVDS(Low-Voltage Differential Signaling). Simulation and measurement results of the eye-diagram are analyzed, proving the applicability of the proposed circuit and technique.

Key words: signal integrity, jitter, pre-emphasis circuit, ringing, impedance matching


  • TN431.2