J4 ›› 2015, Vol. 42 ›› Issue (6): 61-65+87.doi: 10.3969/j.issn.1001-2400.2015.06.011

• 研究论文 • 上一篇    下一篇

高精度SAR ADC非理想因素分析及校准方法


  1. (西安电子科技大学 微电子学院,陕西 西安  710071)
  • 收稿日期:2014-10-17 出版日期:2015-12-20 发布日期:2016-01-25
  • 通讯作者: 曹超
  • 作者简介:曹超(1988-),男,西安电子科技大学博士研究生,E-mail: chao_cao@126.com.
  • 基金资助:


Analysis of non-ideal factors and digital calibration for highresolution SAR ADCs

CAO Chao;MA Rui;ZHU Zhangming;LIANG Yuhua;YE Qian   

  1. (School of Microelectronic, Xidian Univ., Xi'an  710071, China)
  • Received:2014-10-17 Online:2015-12-20 Published:2016-01-25
  • Contact: CAO Chao


对高精度逐次逼近型模数转换器的非理想因素进行理论推导和建模分析,表明模数转换器精度主要受电容失配和低位电容阵列及耦合电容的寄生电容影响,而高位寄生电容的影响可以忽略.建立了16位逐次逼近型模数转换器的高层次模型,验证了理论分析,并通过一种全数字的后台校准技术来减小电容失配和寄生电容的影响. 仿真结果表明,校准后的有效位数在15位以上的概率超过90%.

关键词: 高精度模数转换器, 逐次逼近型模数转换器, 电容失配, 数字校准, 高层次建模


An analysis of capacitor mismatch in a high resolution successive approximation register (SAR) analog-to-digital converter (ADC) is described. The results show that the mismatch of capacitors and the parasitic capacitance in the LSB capacitor array have a significant influence on the resolution of ADC while the parasitic one in MSB array has little influence on the precision. A 16-bit SAR ADC high-level model is designed and a background digital calibration is proposed to calibrate the errors due to the mentioned sources. Simulation results indicate that the ENOB(Effective number of bits) after calibration is above 15 bit with a probability of more than 90%. The availability of this calibration method is verified, so it can be utilized to calibrate high-resolution SAR ADC.

Key words: high resolution analog-to-digital converters, successive approximation register analog-to-digital converters, capacitor mismatch, digital calibration, high-level model