一种CNFET的多位三值比较器设计

doi:10.3969/j.issn.1001-2400.2016.01.025

J4 ›› 2016, Vol. 43 ›› Issue (1): 139-143+156.doi: 10.3969/j.issn.1001-2400.2016.01.025

一种CNFET的多位三值比较器设计

唐伟童;汪鹏君;王谦

(宁波大学电路与系统研究所，浙江宁波 315211)

收稿日期:2014-09-28 出版日期:2016-02-20 发布日期:2016-04-06
作者简介:唐伟童(1989-), 男, 宁波大学硕士研究生, E-mail: twtw4747@163.com．
基金资助:
国家自然科学基金资助项目(61234002，61274132)；浙江省自然科学基金资助项目(Z1111219)

Design of the magnitude ternary comparator of CNFET

TANG Weitong;WANG Pengjun;WANG Qian

(Institute of Circuits and Systems, Ningbo Univ., Ningbo 315211, China)

Received:2014-09-28 Online:2016-02-20 Published:2016-04-06

摘要/Abstract

摘要：

针对三值比较器速度慢和功耗高的问题．在研究多值逻辑电路工作原理和比较器电路结构的基础上，提出一种碳纳米场效应晶体管的新型多位三值比较器．该电路首先将三值译码信号输入到比较器中，然后对比较结果进行编码转换，最后将各个模块组合为多位三值比较器．实验结果证明其具有正确的逻辑功能，较快的速度和低功耗特性．

关键词: 多值逻辑, 碳纳米场效应晶体管, 低功耗, 比较器, 编译码

Abstract:

As the ternary comparator faces problems of slow speed and high power consumption, this paper proposes a scheme for the magnitude ternary comparator of CNFET, which is researching on theory of multi-valued logic circuit and the structure of comparator circuit. First, the ternary decode signal is propagated to the comparator, then the encoder circuit encodes the results of comparison, and finally the magnitude ternary comparator is made up of all kinds of modules. The magnitude comparator is simulated by software, which demonstrates that it has a correct logic function, fast speed and low power consumption characteristics.

Key words: multi-valued logic, CNFET, low power consumption, comparator, codec

唐伟童;汪鹏君;王谦. 一种CNFET的多位三值比较器设计[J]. J4, 2016, 43(1): 139-143+156.

TANG Weitong;WANG Pengjun;WANG Qian. Design of the magnitude ternary comparator of CNFET[J]. J4, 2016, 43(1): 139-143+156.

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一种CNFET的多位三值比较器设计

Design of the magnitude ternary comparator of CNFET

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