低成本片上射频内建自测系统的关键参数测量

doi:10.3969/j.issn.1001-2400.2017.04.006

摘要/Abstract

摘要：

针对芯片射频测试成本不断提高的问题，提出了一种低成本片上系统射频内建自测电路结构及其关键参数测量处理方法．此射频内建自测结构着重利用片上已有数字信号处理器、坐标旋转数字计算机和模数转换器对射频测试信号进行数字傅里叶变换，并利用低成本结构进行对数计算得到相应的信噪比．另外，该自测结构利用环回结构设计，将射频部分产生的信号用来作为测试信号而避免了外部噪声的干扰．这种射频内建自测方法已经成为一种有效的、低成本的设计方法，并用于新产品的量产．相对于以往的射频测试方法，该方法有效地减小了额外的硬件开销，在保证测试质量的情况下，降低了射频电路的测试成本．

关键词: 射频内建自测, 坐标旋转数字计算机, 环回结构, 信噪比

Abstract:

The major occupation in testing cost for the RF blocks of a system-on-chip (SOC) makes it a critical issue in the current complex integrated system. In this paper, a low cost RF Build-In Self-Test structure and methods for processing test data are proposed. The RF front-end has been tested with the help of on-chip DSP, CORDIC and ADC converters. The Digital Fourier Transform (DFT) and SNR results of the generated digital signature are presented in detail with the innovated logarithm calculation method. With the specified loopback structure design, the internal test tone can be used to avoid external noise influence. The RF BIST is applied and verified in mass production, which is effective for low-cost production. Compared to the traditional RF testing, this method can reduce the hardware overhead and decrease the cost with high testing quality.

Key words: radio frequency build-in self-test, coordinate rotation digital computer, loopback structure, signal-to-noise ratio

朱嘉;刘红侠. 低成本片上射频内建自测系统的关键参数测量[J]. 西安电子科技大学学报, 2017, 44(4): 29-33.

ZHU Jia;LIU Hongxia. RF build-in self-test and key measurement processing for the low-cost system-on-chip[J]. Journal of Xidian University, 2017, 44(4): 29-33.

参考文献

［1］ RIM A, INTISSSAR T, MOHAMEDR M. Fault Coverage Analysis of Selection Circuit Based BIST for RF CP-PLL ［C］//Proceedings of the 13th International Multi-conference on Systems, Signals and Devices. Piscataway: IEEE, 2016: 552-557.
［2］ DONG X, CHEN M J, SUN J G. Scan BIST with Biased Scan Test Signals ［J］. Science in China Series F: Information Sciences, 2008, 51(7): 881-895.
［3］ RYU J Y, KIM B C. Low-cost Testing of 5GHz Low Noise Amplifiers Using New RF BIST Circuit ［J］. Journal of Electronic Testing: Theory and Applications, 2005, 21(6): 571-581.
［4］ JEONG J W, KITCHEN J, OZEV S. Process Independent Gain Measurement with Low Overhead via BIST/DUT Co-design ［C］//Proceedings of the IEEE VLSI Test Symposium: 2016. Piscataway: IEEE, 2016: 1-6.
［5］ TANG A, YU L, HAN F J, et al. CORDIC-based FFT Real-time Processing Design and FPGA Implementation［C］//Proceedings of the 2016 IEEE 12th International Colloquium on Signal Processing and Its Applications. Piscataway: IEEE, 2016: 233-236.
［6］ RYU J Y, KIM B C, SYLLA I. A New Low-cost RF Built-in Self-test Measurement for System-on-chip Transceivers［J］. IEEE Transactions on Instrumentation and Measurement, 2006, 55(2): 381-388.
［7］ SLEIMAN B, ISMAIL M. A CMOS Amplitude Detector for RF-BIST and Calibration［C］//Proceedings of the 2009 16th IEEE International Conference on Electronics, Circuits and Systems. Piscataway: IEEE, 2009: 807-810.
［8］ JEONG J W, NASSERY A, KITCHEN J N, et al. Built-in Self-test and Digital Calibration of Zero-IF RF Transceivers ［J］. IEEE Transactions on Very Large Scale Integration(VLSI) Systems, 2016, 24(6): 2286-2298.
［9］ JEONG J W, OZEV S, SEN S, et al. Built-in Self-test and Characterization of Polar Transmitter Parameters in the Loop-back Mode［C］//Proceedings of the Design, Automation and Test in Europe. Piscataway: IEEE, 2014: 1-6.
［10］ LIANG C F, CHEN S H, LIU S I. A Digital Calibration Technique for Charge Pumps in Phase-locked Systems［J］. IEEE Journal of Solid-State Circuits, 2008, 43(2): 390-398.
［11］ AGARWAL P, SINGH S P, KUMAR PANDEY V. Mathematical Analysis of Blackman Window Function in Fractional Fourier Transform Domain［C］//Proceedings of the 2014 International Conference on Medical Imaging, m-Health and Emerging Communication Systems. Piscataway: IEEE, 2014: 120-125.
［12］ TOIHRIA I, AYADI R, MASMOUDI M. High Performance BIST PLL Approach for VCO Testing［C］//Proceedings of the 2014 1st International Conference on Advanced Technologies for Signal and Image Processing. Piscataway: IEEE , 2014: 517-522.
［13］ WU Y R, HSIEH Y K, KU P C, et al. A Built-in Gain Calibration Technique for RF Low-noise Amplifiers［C］//Proceedings of the IEEE VLSI Test Symposium. Piscataway: IEEE, 2014: 1-6.

[1]	林红波,马阳. 空间自适应EPLL低频地震随机噪声降噪方法[J]. 西安电子科技大学学报, 2021, 48(6): 204-211.
[2]	冯象初,王萍,何瑞强. 一种应用博弈和L0约束的盲图像修复方法[J]. 西安电子科技大学学报, 2021, 48(4): 103-112.
[3]	周宇,陈智雄,卓泽朋,杜小妮. (n,m)函数抗差分功耗攻击指标的研究综述[J]. 西安电子科技大学学报, 2021, 48(1): 50-60.
[4]	赵伟,侴胜男,杨烁,李雄飞. 采用盲源分离的扩频通信抗干扰算法[J]. 西安电子科技大学学报, 2020, 47(1): 73-79.
[5]	贾海蓉,王卫梅,吉慧芳. 信噪比信息与时频特征修正相位的语音增强[J]. 西安电子科技大学学报, 2019, 46(5): 162-170.
[6]	姚亚峰;冯中秀;陈朝. 超低时延免迭代CORDIC算法[J]. 西安电子科技大学学报, 2017, 44(4): 162-166.
[7]	刘海涛;丛婉;尹志胜;李冬霞. 峰值门限脉冲熄灭OFDM接收机符号差错概率[J]. 西安电子科技大学学报, 2017, 44(1): 125-129+164.
[8]	徐冬冬;张宇;聂婷;张星祥;任建岳. 小型CMOS相机系统设计及其硬件实现[J]. 西安电子科技大学学报, 2016, 43(4): 117-122.
[9]	路卫军;雷登云;于敦山. 一种适用于弱信号的混合差分位同步算法[J]. 西安电子科技大学学报, 2016, 43(3): 90-94+154.
[10]	薛海伟;冯大政. 一种快速的InSAR图像精配准方法[J]. 西安电子科技大学学报, 2016, 43(3): 172-178.
[11]	张君昌;张丹;崔力. 一种鲁棒自适应阈值的语音端点检测方法[J]. J4, 2015, 42(5): 115-119.
[12]	王晓峰;张国毅;芮国胜. 低信噪比下多相码信号检测与参数估计方法[J]. J4, 2015, 42(1): 174-179.
[13]	陈倩倩;邢孟道;李浩林;保铮. 一种适用于低信噪比短CPI的ISAR横向定标算法[J]. J4, 2014, 41(6): 12-17+64.
[14]	张佳佳;周芳;孙光才;邢孟道;保铮. 二维脉内扫描高信噪比高分辨大测绘带成像[J]. J4, 2014, 41(4): 6-12+150.
[15]	张君昌;胡海涛;崔力. 融合Burg谱估计与信号变化率测度的语音端点检测[J]. J4, 2014, 41(3): 192-195+220.