一种高性能快速傅里叶变换的硬件设计

doi:10.3969/j.issn.1001-2400.2018.03.012

西安电子科技大学学报

一种高性能快速傅里叶变换的硬件设计

沈耀坡;梁煜;张为

(天津大学微电子学院，天津 300072)

收稿日期:2017-07-13 出版日期:2018-06-20 发布日期:2018-07-18
作者简介:沈耀坡(1991-)，男，天津大学微电子学院硕士研究生，E-mail：syptju@163.com
基金资助:
国家自然科学基金资助项目(61474080)

Hardware efficient fast Fourier transform architecture

SHEN Yaopo;LIANG Yu;ZHANG Wei

(School of Microelectronics, Tianjin Univ., Tianjin 300072, China)

Received:2017-07-13 Online:2018-06-20 Published:2018-07-18

摘要/Abstract

摘要：

针对现有架构中复数乘法器普遍存在关键路径较长且硬件效率低下的问题，设计了一种高性能单路延时反馈结构的基2²快速傅里叶变换．利用旋转因子乘法中一个乘数为常数的特点，提出用常数乘法器替代传统复数乘法器的方法来实现旋转因子乘法．另外，还提出了一种新型常数乘法器设计方法即系数放大法，通过将旋转因子常系数放大的方法使相应常数乘法器所需的加法器数量减少到最低，减小了硬件资源消耗的同时也进一步缩短了关键路径，提高了硬件效率．文中设计的16点快速傅里叶变换在0.18μm工艺下的最大时钟频率可达710MHz，面积约为0.12mm²; 对比其他构架，在Xilinx Virtex-4上所需slice数量减少8％，单位面积吞吐率约提高了1倍; 在Xilinx Virtex-5上所需LUT数量减少44％，单位面积吞吐率约提高了1倍．

关键词: 快速傅里叶变换, 单路延迟反馈, 常数乘法器, 系数放大法

Abstract:

This paper presents a hardware efficient Radix-2² Fast Fourier Transform (FFT) based on a single path delay feedback (SDF) architecture. The complex multipliers in previous architectures generally have some problems, such as a long critical path and hardware inefficiency. Because of the constant multiplicator in rotation factor multiplication, the constant multiplier is used to replace the traditional complex multiplier. Besides, a new method —“coefficient enlargement” is proposed to design the constant multiplier. By enlarging the coefficient of the rotation factor, the number of adders required for the corresponding constant multiplier is reduced to the minimum. This method reduces the consumption of hardware resources, shortens the critical path and improves the hardware efficiency. The 16-point FFT's maximum clock frequency can be up to 710MHz, and the area is about 0.12mm² under the 0.18μm ASIC technology. Compared to other architectures, the proposed architecture involves about 8％ less slice count and throughput per slice is doubled in the Xilinx Virtex-4 FPGAs and it involves about 44％ less LUT count and throughput per LUT is doubled in the Xilinx Virtex-5 FPGAs.

Key words: fast Fourier transform, single delay feedback, constant multiplier, coefficient enlargement

沈耀坡;梁煜;张为. 一种高性能快速傅里叶变换的硬件设计[J]. 西安电子科技大学学报, 2018, 45(3): 63-67+96.

SHEN Yaopo;LIANG Yu;ZHANG Wei. Hardware efficient fast Fourier transform architecture[J]. Journal of Xidian University, 2018, 45(3): 63-67+96.

参考文献

［1］张亚洲, 张超, 王保锐, 等. 实时频谱分析仪中并行FFT算法的FPGA设计［J］. 单片机与嵌入式系统应用, 2016(5): 23-26.
ZHANG Yazhou, ZHANG Chao, WANG Baorui, et al. FPGA Design of Parallel FFT Algorithm in Real-time Spectrum Analyzer［J］. Microcontrollers & Embedded Systems, 2016(5): 23-26.
［2］ ZHOU B, HWANG D. Implementations and Optimizations of Pipeline FFTs on Xilinx FPGAs［C］//Proceedings of the 2008 International Conference on Reconfigurable Computing and FPGAs. Piscataway: IEEE, 2008: 325-330.
［3］ ZHOU B, PENG Y, HWANG D. Pipeline FFT Architectures Optimized for FPGAs［J］. International Journal of Reconfigurable Computing, 2009, 2009(5): 9.
［4］ WANG H Y, WU J J, CHIU C W, et al. A Modified Pipeline FFT Architecture［C］//Proceedings of the 2010 International Conference on Electrical and Control Engineering. Piscataway: IEEE, 2010: 4611-4614.
［5］ WANG Z, LIU X, HE B, et al. A Combined SDC-SDF Architecture for Normal I/O Pipelined Radix-2 FFT［J］. IEEE Transactions on Very Large Scale Integration Systems, 2015, 23(5): 973-977.
［6］胡锦涛, 李路, 姚如贵, 等. 基于FPGA的面积有效FFT实现技术研究［J］. 电子设计工程, 2016, 24(8): 94-97.
HU Jintao, LI Lu, YAO Guru, et al. Research on the Effective Area FFT Implementation Based on FPGA［J］. Electronic Design Engineering, 2016, 24(8): 94-97.
［7］吴金红, 曹建, 赵岩. 基于FPGA的OFDM改进调制解调器设计［J］. 计算机测量与控制, 2010, 18(12): 2815-2817, 2835.
WU Jinhong, CAO Jian, ZHAO Yan. Design of OFDM Improved Modulator and Demodulator Based on FPGA［J］. Computer Measurement & Control, 2010, 18(12): 2815-2817, 2835.
［8］钟冠文, 卢亚伟, 付欣玮, 等. 基于FPGA的1024点高性能FFT处理器的设计［J］. 微计算机信息, 2012, 28(8): 66-67.
ZHONG Guanwen, LU Yawei, FU Xinwei, et al. Design of 1024 Point FFT Processor Based on FPGA［J］. Microcomputer Information, 2012, 28(8): 66-67.
［9］ HE S, TORKELSON M. New Approach to Pipeline FFT Processor［C］//Proceedings of the 1996 IEEE Symposium on Parallel and Distributed Processing. Piscataway: IEEE, 1996: 766-770.
［10］ QURESHI I A, QURESHI F, SHAIKH G M. Efficient FPGA-mapping of 1024 Point FFT Pipeline SDF Processor［C］//Proceedings of the 2014 International Symposium on Parallel Architectures, Algorithms and Programming. Piscataway: IEEE, 2014: 29-34.
［11］ TANG A, YU L, HAN F, et al. CORDIC-based FFT Real-time Processing Design and FPGA Implementation［C］//Proceedings of the 2016 IEEE 12th International Colloquium on Signal Processing and Its Applications. Piscataway: IEEE, 2016: 233-236.
［12］ TRAN T H, KANAGAWA S, NGUYEN D P, et al. ASIC Design of MUL-RED Radix-2 Pipeline FFT Circuit for 802. 11ah System［J］. IEEE Low-Power High-Speed Chips, 2016, 1(3): 9-11.

[1]	洪钦智,王志君,郭一凡,梁利平. 一种支持多数据块混合处理的FFT优化方法[J]. 西安电子科技大学学报, 2022, 49(6): 42-50.
[2]	贺王鹏,陈彬强,李阳,陈晶,郭宝龙. 高速切削欠采样动态信号的压缩感知恢复方法[J]. 西安电子科技大学学报, 2022, 49(4): 82-89.
[3]	周佳鑫,沈炳声,周正春,范平志,骆喆. 结构化导频序列设计及低复杂度检测算法[J]. 西安电子科技大学学报, 2020, 47(6): 45-49.
[4]	戈立军;赵澜;李月;郭徽;李明阳;赵瑞君. 全相位FFT的OFDM系统ΣΔ量化噪声整形[J]. 西安电子科技大学学报, 2017, 44(4): 80-85+117.
[5]	张浪;侯志强;余旺盛;许婉君. 利用快速傅里叶变换的双层搜索目标跟踪算法[J]. 西安电子科技大学学报, 2016, 43(5): 153-159.
[6]	王兴;龚书喜;王文涛;张玉洁. 一种快速分析面面结构电磁辐射特性算法[J]. J4, 2011, 38(4): 106-111.
[7]	熊何锐；郝学飞；胡国荣. 高速广义多载波解调的低成本硬件优化设计[J]. J4, 2011, 38(3): 169-174.
[8]	刘德福;雷天民;马卓;李颖;王旸. LTE系统中可配置FFT／IFFT的设计与实现[J]. J4, 2010, 37(5): 813-816+824.
[9]	张犁;李双飞;石光明;李甫. 一种FFT并行处理机的设计与实现[J]. J4, 2010, 37(4): 630-635.
[10]	王宏伟;赵国庆;王玉军;鲍丹. 一种宽带数字信道化接收机[J]. J4, 2010, 37(3): 487-491+553.
[11]	黄春明;安翔;吕志清. 电大尺寸线面结构辐射特性的自适应积分方法准确分析[J]. J4, 2009, 36(4): 721-724.
[12]	刘红侠;杨靓;黄巾;黄士坦. 可变长FFT并行旋转因子高效产生算法及实现[J]. J4, 2009, 36(3): 541-546.
[13]	陈增帅;赖奔;黄春明;梁昌洪. 电大散射问题的复合场积分方程快速傅里叶变换算法[J]. J4, 2009, 36(3): 463-467.
[14]	陈忠宽;王生水;柴舜连;毛钧杰. 用P-FFT方法求解电磁散射问题的改进模板拓扑 [J]. J4, 2007, 34(7): 164-167.
[15]	苏涛;庄德靖;吴顺君. 一种SAR成像快速算法及其并行实现[J]. J4, 2005, 32(1): 21-25.

一种高性能快速傅里叶变换的硬件设计

Hardware efficient fast Fourier transform architecture

PDF (PC)

赞

可视化

摘要/Abstract

引用本文

使用本文

参考文献

相关文章 15

Metrics

本文评价

推荐阅读 0