J4 ›› 2009, Vol. 36 ›› Issue (6): 1063-1069.

• 研究论文 • 上一篇    下一篇



  1. (1. 西安电子科技大学 微电子学院,陕西 西安  710071
    2. 西安邮电学院 计算机系,陕西 西安  710121)
  • 收稿日期:2008-09-12 出版日期:2009-12-20 发布日期:2010-01-20
  • 通讯作者: 刘有耀
  • 作者简介:刘有耀(1975-),男,西安电子科技大学博士研究生,E-mail: lyyao2002@xiyou.edu.cn.
  • 基金资助:


Star-cluster double-loop topology for the network-on-chip

LIU You-yao1,2;HAN Jun-gang1,2

  1. (1. School of Microelectronic, Xidian Univ., Xi'an  710071, China
    2. Dept. of Computer, Xi'an Inst. of Posts and Telecommunications, Xi'an  710121, China)
  • Received:2008-09-12 Online:2009-12-20 Published:2010-01-20
  • Contact: LIU You-yao


随着半导体工艺的不断发展和芯片中所包含的IP核数目的增加,片上系统的互连结构对系统性能和面积具有极大的影响.为了减少节点度、减少链路和重用路由器节点,提出了一种规则的片上互连网络——星簇双环 (Star-Cluster Double-Loop,SCDL(2m))拓扑结构,该拓扑结构具有4m个节点并且每个节点连接3个相邻节点和4个IP核.SCDL(2m)是一种拓扑结构简单、平面的、对称的并且具有良好扩展性的互连网络.SCDL(2m)互连网络节点采用一种新的约翰逊编码方法,使得路由算法简单高效.在不同负载和不同节点数量情况下,对SCDL(2m),Cluster-Ring和Cluster-Mesh网络的平均通讯延迟和平均吞吐量进行了模拟分析,结果表明SCDL(2m)互连网络较好的平衡了网络性能和成本,是一种简单高效的片上互连网络.

关键词: 片上系统, 片上网络, 网络拓扑, 路由算法


With the feature size of semiconductor process reduced and IP(Intellectual Properties)  cores increased, interconnection network architectures on the chip have a great influence on the performance and area of System-on-Chip(SoC) design. Focusing on decreasing node degrees, reducing links and reusing the router node, a regular Network-on-Chip(NoC) architecture, named the Star-Cluster Double-Loop(SCDL(2m)) interconnection network, is proposed. The topology of SCDL(2m) is simple, planar, symmetric and scalable in architecture, and it has 4m nodes. Each node connects three adjacent nodes and four IP cores. The nodes of SCDL(2m) adopt the Johnson coding scheme that can make the design of routing algorithm simple and efficient. The SCDL(2m) is compared with Cluster-Ring and Cluster-Mesh by simulation and analysis, both under a uniform load and under more realistic load assumptions in several network size scenarios. The results show that the SCDL(2m) topology is a good trade-off between performance and cost. It is a better topology for NoC.

Key words: system-on-chip, network-on-chip, network topology, routing algorithms


  • TN911.22