一种用于14位1.28MS/sΣΔADC的数字抽取滤波器设计

doi:10.3969/j.issn.1001-2400.2010.02.024

J4 ›› 2010, Vol. 37 ›› Issue (2): 315-319.doi: 10.3969/j.issn.1001-2400.2010.02.024

一种用于14位1.28MS/sΣΔADC的数字抽取滤波器设计

杨银堂;李迪;石立春

(西安电子科技大学微电子学院，陕西西安 710071)

收稿日期:2009-06-17 出版日期:2010-04-20 发布日期:2010-06-03
通讯作者: 杨银堂
作者简介:杨银堂(1962-)，男，教授，博士，E-mail: ytyang@xidian.edu.cn．
基金资助:
国家自然科学基金资助项目(60476046，60676009); 教育部博士点基金资助项目(20050701015)

Decimation filter design for 14-bit 1.28MS/s sigma-delta ADC

YANG Yin-tang;LI Di;SHI Li-chun

(School of Microelectronic, Xidian Univ., Xi'an 710071， China)

Received:2009-06-17 Online:2010-04-20 Published:2010-06-03
Contact: YANG Yin-tang

摘要/Abstract

摘要：

设计了一种数字抽取滤波器，此滤波器由多级级联结构组成，对sigma-delta调制器的输出信号进行滤波和64倍的降采样，具有较小的电路面积和较低的功耗．采用TSMC 0.18μm CMOS工艺实现，工作电压1.8V，流片测试结果表明: sigma-delta调制器输出信号经过数字抽取滤波器后，信噪失真比(SNDR)达到了93.9dB，满足设计要求．所提出的数字抽取滤波器-6dB带宽为640kHz，抽取后的采样频率为1.28MHz，功耗为33mW，所占面积约为0.4mm×1.7mm．

关键词: ΣΔ调制器, 模数转换器, 数字抽取滤波器, FIR滤波器, CIC滤波器

Abstract:

A decimation filter for a 4th-order single-bit single-loop oversampling sigma-delta modulator is designed. Consisting of multi stages, the decimation filter is used to filter the noise in the output signal of the modulator and has a decimation factor of 64. It has a small circuit area and low power dissipation. The filter has been fabricated by the TSMC 0.18μm CMOS process and operates at a voltage of 1.8V. Experimental results show that the output signal of the decimation filter has an SNDR (Signal-to-Noise-and-Distortion-Ratio) of 93.9dB which meets the requirement of the system design. The presented filter has a -6dB pass-band of 640kHz, a power dissipation of 33mW and occupies a die area of about 0.4mm×1.7mm.

Key words: sigma-delta modulator, ADC, decimation filter, FIR filter, CIC filter

杨银堂;李迪;石立春. 一种用于14位1.28MS/sΣΔADC的数字抽取滤波器设计[J]. J4, 2010, 37(2): 315-319.

YANG Yin-tang,LI Di,SHI Li-chun. Decimation filter design for 14-bit 1.28MS/s sigma-delta ADC[J]. J4, 2010, 37(2): 315-319.

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一种用于14位1.28MS/sΣΔADC的数字抽取滤波器设计

Decimation filter design for 14-bit 1.28MS/s sigma-delta ADC

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