J4 ›› 2012, Vol. 39 ›› Issue (2): 95-100+174.doi: 10.3969/j.issn.1001-2400.2012.02.016

• 研究论文 • 上一篇    下一篇

一种应用于流水折叠式A/D转换器的失调抵消预放大器

李晓娟;杨银堂   

  1. (西安电子科技大学 微电子学院,陕西 西安  710071)
  • 收稿日期:2011-03-28 出版日期:2012-04-20 发布日期:2012-05-21
  • 通讯作者: 李晓娟
  • 作者简介:李晓娟(1979-),女,西安电子科技大学博士研究生,E-mail: xjli_014@126.com.
  • 基金资助:

    国家自然科学基金资助项目(60725415,60971066,61006028);国家863资助项目(2009AA01Z258);陕西省重大技术创新专项资助项目(2009ZKC02-11)

Offset cancellation preamplifier for pipelined folding A/D converter

LI Xiaojuan;YANG Yintang   

  1. (School of Microelectronic, Xidian Univ., Xi'an  710071, China)
  • Received:2011-03-28 Online:2012-04-20 Published:2012-05-21
  • Contact: LI Xiaojuan

摘要:

根据流水折叠式A/D转换器的应用要求,设计了一种失调抵消预放大器.采用开关电容电路实现失调存储技术,以减小输入失调电压对转换精度的影响,并通过引入MOS电容实现回馈噪声中和技术.基于SMIC 0.18μm CMOS工艺,在1.8V电源电压、200MHz时钟频率下,对所设计的预放大器进行了功能验证和蒙特卡洛分析.其失调方差仅为3.24mV,功耗为362μW.测试了整个10位100MS/s  A/D转换器,最大INL和DNL分别为1.6LSB和0.6LSB.在fin=32MHz,fs=100MHz时,测得SFDR为55dB.

关键词: 失调抵消, 回馈噪声, 预放大器, A/D转换器, 流水折叠

Abstract:

This paper presents an offset cancellation preamplifier based on the requirement of the pipelined folding A/D converter. The offset storage technique is realized with switched capacitor circuits to eliminate the effect of the input offset voltage on the resolution. The neutralization technique is introduced by MOS capacitors to reduce the kickback noise. In the SMIC 0.18μm CMOS process, by Mente Carlo simulation the preamplifier with offset variance of 3.24mV is verified and 362μW is consumed at 1.8V and 200MHz. The measured peak INL and DNL are 1.6LSB and 0.6LSB for the 10bit 100MS/s A/D converter. SFDR is 55dB when fin=32MHz at fs=100MHz.

Key words: offset cancellation, kickback noise, preamplifier, A/D converters, pipelined folding

中图分类号: 

  • TN402