无损高压缩率电路设计

doi:10.19665/j.issn1001-2400.2019.02.007

西安电子科技大学学报 ›› 2019, Vol. 46 ›› Issue (2): 35-40.doi: 10.19665/j.issn1001-2400.2019.02.007

无损高压缩率电路设计

朱嘉,刘红侠()

西安电子科技大学微电子学院,陕西西安 710071

收稿日期:2018-12-16 出版日期:2019-04-20 发布日期:2019-04-20
通讯作者: 刘红侠
作者简介:朱嘉(1984-),男,西安电子科技大学博士研究生,E-mail:691460028@qq.com
基金资助:
国家自然科学基金(61434007)

Lossless high compression ratio circuit design

ZHU Jia,LIU Hongxia()

School of Micro-electronic Engineering, Xidian Univ., Xi’an 710071, China

Received:2018-12-16 Online:2019-04-20 Published:2019-04-20
Contact: Hongxia LIU

摘要/Abstract

摘要：

为了节省传输系统数据带宽,满足实时压缩要求,通过对Deflate算法硬件实现,设计了一种无损高压缩率电路。通过4列双哈希并行匹配,采用静态哈夫曼编码技术,发挥硬件流水结构和并行计算优势,提升了压缩速度及压缩率。该硬件电路由系统硬件描述语言设计,使用现场可编程阵列进行测试并验证,最终应用于基带追踪数据进行流片,压缩模块面积为0.022 mm ²。测试数据表明:该压缩电路获得了56.68%的高平均压缩率,压缩速率提高至1039Mbit/s。该压缩模块速率及压缩率可满足基带数据追踪系统实时压缩要求。

关键词: 无损压缩, Deflate算法, 双哈希, 并行匹配, 哈夫曼编码

Abstract:

In order to save the bandwidth and meet the compression requirement of a real-time system, a novel hardware compression circuit based on the deflate algorithm is proposed. Dual hash functions with four columns parallel match processing and a static Huffman encoder are employed to accelerate the compression speed and improve the compression ratio. The compression circuit is implemented with System Verilog, verified by the FPGA, and applied in the trace module in the baseband chip, with the area of the compression module being 0.022mm ². Test results show that the compression ratio of the hardware circuit reaches 56.68%. The circuit average bandwidth of compression reaches 1039M bit/s, which can satisfy the real-time compression of the baseband trace system.

Key words: lossless compression, deflate algorithm, dual hash, parallel match, Huffman coding

中图分类号:

朱嘉,刘红侠. 无损高压缩率电路设计[J]. 西安电子科技大学学报, 2019, 46(2): 35-40.

ZHU Jia,LIU Hongxia. Lossless high compression ratio circuit design[J]. Journal of Xidian University, 2019, 46(2): 35-40.

图/表 7

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参考文献 14

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哈希地址	哈希值				数据指针
哈希地址0	哈希值[0]	哈希值[1]	哈希值[2]	哈希值[3]	指针[0]	指针[1]	指针[2]	指针[3]
哈希地址1	哈希值[0]	哈希值[1]	哈希值[2]	哈希值[3]	指针[0]	指针[1]	指针[2]	指针[3]
?
哈希地址n	哈希值[0]	哈希值[1]	哈希值[2]	哈希值[3]	指针[0]	指针[1]	指针[2]	指针[3]

测试源	压缩率/%			压缩速度/Mbps^-1
	软件	硬件1	硬件2	Core i5	Core i7	硬件1	硬件2
Bib	32.1	71.6	60.9	16	15	172	989
book1	40.9	84.9	70.1	36	33	154	907
book2	33.8	74.9	59.8	38	31	172	1009
geo	67.0	82.5	89.4	17	16	176	750
news	38.5	69.1	62.7	35	27	172	940
obj1	52.4	66.7	57.9	9	10	168	1001
obj2	33.1	56.4	48.8	25	20	169	1153
Paper1	36.6	73.1	58.6	17	22	172	1017
Paper2	37.0	77.8	62.1	22	20	174	989
Paper3	39.1	80.4	64.3	15	11	175	1002
Paper4	46.1	76.9	61.4	6	6	173	981
Paper5	41.7	75.0	59	7	6	177	993
Paper6	36.8	71.1	56.9	13	19	175	977
pic	11.2	22.9	21.5	39	28	194	1474
progc	35.9	61.5	53.2	6	9	171	1099
progl	22.8	48.6	41.2	21	18	168	1231
progp	22.5	44.9	41.9	17	13	169	1250
trans	20.7	47.7	50.6	28	23	151	940

无损高压缩率电路设计

Lossless high compression ratio circuit design

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