3.3V CMOS工艺下5V电源轨的ESD箝位电路

陈迪平;董刚

ESD power-rail clamp circuit with a 5V power in the 3.3V CMOS process

CHEN Diping;DONG Gang

西安电子科技大学学报 . 2018, (5): 96 -101 . DOI: 10.3969/j.issn.1001-2400.2018.05.016