一种高性能的全数字锁相环设计方案
屈八一,程腾,俞东松,李智奇,周渭,李珊珊,刘立东
Design scheme for an all-digital phase locked loop with a high performance
QU Bayi,CHENG Teng,YU Dongsong,LI Zhiqi,ZHOU Wei,LI Shanshan,LIU Lidong
西安电子科技大学学报
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2019, (1): 112
-116
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DOI: 10.19665/j.issn1001-2400.2019.01.018
