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Estimation of coupling noise in VLSI design

DONG Gang;YANG Yin-tang;LI Yue-jin;CHAI Chang-chun

  

  1. (Research Inst. of Microelectronics, Xidian Univ., Xi'an 710071, China)
  • Received:1900-01-01 Revised:1900-01-01 Online:2005-04-20 Published:2005-04-20

Abstract: The coupling effect induced by capacitance has become a key factor in VLSI design, as taller and narrower wires are now placed closer to each other. In this paper, we apply the L model for coupling interconnects and present an analytical expression for coupling noise based on dominant-pole approximation. The factors affecting peak noise are discussed. Compared with the methods available, the model is simplified without lowering accuracy. It can be used in noise-aware layout optimization.

Key words: interconnect coupling noise, dominant-pole approximation, sensitivity

CLC Number: 

  • TN405.97