Journal of Xidian University

Previous Articles     Next Articles

SRAM-FPGA SEU mitigation method and prediction

GUO Qiang1;LIU Bo2;SI Shengping2;LIU Hui2;JIANG Yingfu2;ZHANG Heng2   

  1. (1. Shanghai Academy of Spaceflight Technology, Shanghai 201109, China;
    2. Shanghai Institute of Satellite Engineering, Shanghai 201109, China)
  • Received:2017-03-15 Online:2018-02-20 Published:2018-03-23

Abstract:

In order to solve the problem of Xilinx SRAM-FPGA Single Event Upsets(SEU) in the satellite communication system, we design a less hardware resource and high timeliness method of using the Actel FPGA as the detecting chip. The PROM chip stores the mask bit, reads the Xilinx FPGA configuration file through JTAG and verifies the error. Then it reloads the configuration file to eliminate the SEU effect. The method is successfully applied to a satellite communication system. In order to calculate the reliability of the satellite communication system, the FOM method is used to predict the SEU rate in SRAM FPGA. The results show that this method can be used to calculate the SEU rate in the orbit. And the results can be used to predict the SEU rate in the other SRAM FPGA and Memory, and to provide reference for reliability research and design of China's satellite communication system.

Key words: static random access memory-field programmable gate array, single event upsets, single event upset mitigation method, single event upset rate prediction