Design scheme for an all-digital phase locked loop with a high performance
QU Bayi,CHENG Teng,YU Dongsong,LI Zhiqi,ZHOU Wei,LI Shanshan,LIU Lidong
Journal of Xidian University . 2019, (1): 112 -116 .  DOI: 10.19665/j.issn1001-2400.2019.01.018