Journal of Xidian University ›› 2022, Vol. 49 ›› Issue (4): 184-192.doi: 10.19665/j.issn1001-2400.2022.04.021

• Electronic Science and Technology & Others • Previous Articles     Next Articles

PETA-Gmin:dynamic continuation algorithm for solving nonlinear circuits

JIN Zhou1(),LIU Yi1(),PEI Haojie1(),FENG Tian1(),DUAN Yiru1(),ZHOU Zhenya2()   

  1. 1. College of Information Science and Engineering,China University of Petroleum (Beijing),Beijing 102249,China
    2. Empyrean Technology Company(Beijing),Beijing 100102,China
  • Received:2021-06-02 Online:2022-08-20 Published:2022-08-15

Abstract:

In the transistor-level circuit simulation of integrated circuit design,in order to successfully solve the DC operating point,various DC continuation algorithms were born,such as Gmin stepping algorithm,source stepping algorithm,pseudo-transient algorithm,homotopy algorithm,etc.With the continuous development of integrated circuits,the convergence performance and efficiency of DC analysis algorithms are still a huge challenge for today's large-scale circuits with strong nonlinearity.In order to solve the problems of poor convergence and low simulation efficiency in the simulation process of large-scale circuits with strong nonlinearities,a hybrid multi-phase continuation method named PsEudo-TrAnsientGmin stepping (PETA-Gmin) is proposed to improve the convergence while maintaining a high efficiency.Different from all conventional methods,the PETA-Gmin successfully integrates the pseudo-transient process into the Gmin stepping method.The pseudo-capacitor allows the node voltage to change continuously,thereby effectively improving the problem of discontinuity of the solution curve in the simulation,and improving the convergence.At the same time,the fast stepping of Gmin ensures an excellent simulation efficiency.The proposed PETA-Gmin approach is verified by industrial-level large-scale post-layout circuits.Experimental results demonstrate that the convergence is greatly improved compared with the Gmin stepping method,and that the approach achieves up to 4.89X (2.57X on average) speedup compared with the state-of-the-art pseudo transient analysis method.

Key words: VLSI circuits, DC analysis, nonlinear circuit, circuit simulation, continuation method

CLC Number: 

  • TN47