J4 ›› 2014, Vol. 41 ›› Issue (3): 138-144.doi: 10.3969/j.issn.1001-2400.2014.03.020

• Original Articles • Previous Articles     Next Articles

Novel dual-channel MOS bootstrapped switch circuit

JING Xin;ZHUANG Yiqi;TANG Hualian;ZHANG LI;DU Yongqian   

  1. (Ministry of Education Key Lab. of Wide Band-Gap Semiconductor Materials and Devices, Xidian Univ., Xi'an  710071, China)
  • Received:2013-08-15 Online:2014-06-20 Published:2014-07-10
  • Contact: JING Xin E-mail:jingxin_xd135@126.com

Abstract:

A novel low-voltage, high-speed and high-linear dual-channel MOS bootstrapped switch is proposed. This proposed switch utilizes the bootstrapping technique of both NMOS and PMOS simultaneously, thus resulting in small-variation low-value on-resistance over the entire input signal range. The switch considers reliability constrains and is suitable for standard CMOS technology. Based on the 0.13μm CMOS technology and 1.2V power supply, simulation results show that the switch achieves an on-resistance variation less than 4.3% throughout the full range (Vpp=1V) of the input signal range. For a 100MHz input with 1V (Vpp) amplitude, the switch has a total harmonic distortion (THD) up to -88.33dB at the 100MHz sampling frequency, about -14.8dB and -29dB increase, compared with the conventional bootstrapped NMOS switch and the standard CMOS transmission gate, respectively. The circuit could be applied to the low-voltage and high speed-resolution switched-capacitor circuits.

Key words: bootstrap circuit, CMOS switch linearization, constant on-resistance, charge pump, switched-capacitor circuits, low voltage

CLC Number: 

  • TN432