采用FDDs实现FPRM电路延时和面积优化

doi:10.3969/j.issn.1001-2400.2013.01.024

Abstract

Abstract:

Functional Decision Diagrams (FDDs) are a graphical expression for Reed-Muller (RM) expansion, and its variable order and polarity jointly influence the delay and area of the corresponding circuit. By studying FDDs and fixed polarity RM (FPRM) expansion, a delay and area optimization algorithm is presented. Firstly, a delay evaluation model is set up by FDDs. Then by combining the tabular technique and the search strategy of variable order, the optimal polarity and variable order are searched for both medium-scale and large-scale circuits according to the delay and area. Finally, the algorithm is tested with MCNC Benchmarks. The results show that the proposed algorithm is very effective for delay and area optimization.

Key words: circuits, synthesis, fixed polarity reed-muller, functional decision diagrams, delay and area optimization

CLC Number:

TP391.7

WANG Pengjun;WANG Zhenhai. Delay and area optimization for FPRM circuits by FDDs[J].J4, 2013, 40(1): 135-140.

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Delay and area optimization for FPRM circuits by FDDs

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