A high performance BiCMOS differential reference voltage generator with a current summing architecture is presented. The power supply rejection ratio (PSRR) is improved by using feedback-zero compensation. A high precision and low temperature drift are attained in the current summing temperature compensation mode. In the ASMC 0.35μm 3.3V BiCMOS process, the differential reference voltage generator is simulated and tested below: At a low frequency and at 100MHz, the positive power supply rejection ratio (PSRR+) is 78.1dB and 66.7dB, respectively, the negative power supply rejection ratio (PSRR+) is 72.4dB and 63.8dB, respectively, the average temperature coefficient of the output differential reference voltage is 11×10-6/℃, the active area is 2.2mm2, and the power comsumption is less than 15mW. This proposed differential reference voltage generator can be applied in a 14 bit 100MHz pipeline ADC.