用于片上网络的延时无关异步动态优先级仲裁器

doi:10.3969/j.issn.1001-2400.2012.01.009

Abstract

Abstract:

This paper proposes a delay-independent asynchronous dynamic priority arbiter to improve the quality of service in the asynchronous router of the general-purpose network on chips. In an arbitration period, by comparing the priority of the data packets with request signals, the arbiter will output the data packets in the sequence of descending priority. The packets with equal priority are outputted serially so that it resolves the problems of requests with fixed priority in conventional static arbiters, and improves the scalability of the arbiter and router. The arbiter is implemented based on 0.18μm standard CMOS technology. Results have shown that the average response time is 0.92ns, and that the average dynamic power consumption is 0.75mW per request, which can be used for the asynchronous router of the general-purpose network on chips.

Key words: network on chips, asynchronous router, quality of service, delay-independent, dynamic priority arbitration

CLC Number:

TN402

YANG Yanfei;ZHU Zhangming;ZHOU Duan;YANG Yintang. Delay-independent asynchronous dynamic priority arbiter for the network on chips[J].J4, 2012, 39(1): 42-48+110.

References

［1］ Martin A J, Nystrom M. Asynchronous Techniques for System-on-Chip Design ［J］. Proc of the IEEE, 2006, 94(6): 1089-1120.
［2］杨银堂, 徐阳扬, 周端, 等. 异步超前进位加法器设计［J］. 西安电子科技大学学报, 2009, 36(1): 33-37.
Yang Yintang, Xu Yangyang, Zhou Duan, et al. Design of the Asynchronous CLA Adder ［J］. Journal of Xidian University, 2009, 36(1): 33-37.
［3］ ITRS. International Technology Roadmap for Semiconductors ［EB/OL］. ［2010-05-24］. http://www.itrs.net/home.html.
［4］ Teehan P, Greenstreet M, Lemieux G. A Survey and Taxonomy of GALS Design Styles ［J］. IEEE Design ＆ Test of Computers, 2007, 24(5): 418-428.
［5］管旭光, 周端, 杨银堂, 等. 用于片上网络的高速低功耗多轨协议异步通信信道［J］. 计算机辅助设计与图形学学报, 2009, 21(2): 1700-1705.
Guan Xuguang, Zhou Duan, Yang Yintang, et al. Novel High-speed Low-power Multi-rail Asynchronous Communication Channel for Network on Chips ［J］. Journal of Computer-Aided Design＆Computer Graphics, 2009, 21(12): 1700-1705.
［6］ Khan G N, Dumitriu V. A Modeling Tool for Simulating and Design of On-chip Network Systems ［J］. Microprocessors and Microsystems, 2010, 34(2): 84-95.
［7］ Gu Huaxi, Xu Jiang, Wang Kun, et al. A New Distributed Congestion Control Mechanism for Networks on Chip ［J］. Telecommunication Systems, 2010, 44(3-4): 321-331.
［8］ Li Yonghui, Gu Huaxi. Fault Tolerant Routing Algorithm Based on the Artificial Potential Field Model in Network-on-Chip ［J］. Applied Mathematics and Computation, 2010, 217(7): 3226-3235.
［9］ Bolotin E, Cidon I, Ginosar R, et al. QoS Architecture and Design process for Cost Effective Networks on Chip ［J］. Journal of Systems Architecture, Special Issue on Network on Chip, 2004, 50(2): 105-128.
［10］ Beigne E, Clermidy F, Vivet P, et al. An Asynchronous NoC Architecture Providing Low Latency Service and Multi-level Design Framework ［C］//Proc of the 11th IEEE International Symposium on Asynchronous Circuits and Systems. New York: IEEE Computer Society, 2005: 54-63.
［11］ Dobkin R, Ginosar R, Kolodny A. QNoC Asynchronous Router ［J］. Integration, the VLSI Journal, 2009, 42(2): 103-115.
［12］ Dobkin R, Vishnyakov V, Friedman E, et al. An Asynchronous Router for Multiple Service Levels Networks on Chip ［C］//Proc of the 11th IEEE International Symposium on Asynchronous Circuits and Systems. New York: IEEE Computer Society, 2005: 44-53.
［13］ Zid M, Zitouni A, Baganne A, et al. New Generic GALS NoC Architectures With QoS ［C］//International Conference on Design and Test of Integrated Systems in Nanoscale Technology. La Marsa: IEEE, 2006: 345-349.
［14］ Kinniment D J. Synchronization and Arbitration in Digital Systems ［M］. West Sussex: John Wiley ＆ Sons Ltd, 2007: 246-251.

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Delay-independent asynchronous dynamic priority arbiter for the network on chips

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