一种应用于流水折叠式A/D转换器的失调抵消预放大器

doi:10.3969/j.issn.1001-2400.2012.02.016

Abstract

Abstract:

This paper presents an offset cancellation preamplifier based on the requirement of the pipelined folding A/D converter. The offset storage technique is realized with switched capacitor circuits to eliminate the effect of the input offset voltage on the resolution. The neutralization technique is introduced by MOS capacitors to reduce the kickback noise. In the SMIC 0.18μm CMOS process, by Mente Carlo simulation the preamplifier with offset variance of 3.24mV is verified and 362μW is consumed at 1.8V and 200MHz. The measured peak INL and DNL are 1.6LSB and 0.6LSB for the 10bit 100MS/s A/D converter. SFDR is 55dB when f_in=32MHz at f_s=100MHz.

Key words: offset cancellation, kickback noise, preamplifier, A/D converters, pipelined folding

CLC Number:

TN402

LI Xiaojuan;YANG Yintang. Offset cancellation preamplifier for pipelined folding A/D converter[J].J4, 2012, 39(2): 95-100+174.

References

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Offset cancellation preamplifier for pipelined folding A/D converter

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