Journal of Xidian University ›› 2019, Vol. 46 ›› Issue (4): 182-189.doi: 10.19665/j.issn1001-2400.2019.04.025

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Analysis and detection of TDDB degradation for DRAM in 3D-ICs

JIA Dingcheng1,2,3,WANG Leilei1,2,3,GAO Wei1,2,3   

  1. 1.School of Information Science & Technology, ShanghaiTech Univ., Shanghai 201210, China
    2.Shanghai Institute of Microsystem & Information Technology, Chinese Academy of Sciences,Shanghai 200050, China
    3.School of Electronic, Electrical and Communication Engineering, University of Chinese Academy of Sciences, Beijing 100049, China
  • Received:2019-01-12 Online:2019-08-20 Published:2019-08-15

Abstract:

3D multicore systems with stacked DRAM are capable of boosting system performance significantly, but accompanied with the key problem of the effect of heat density and heat dissipation on circuit reliability. Aiming to study the TDDB (Time Dependent Dielectric Breakdown) effect in DRAM of 3D-ICs, we adopt a physical-based SPICE model and analyze the statistical TDDB degradation induced by the gate leakage current in peripheral circuits of DRAM. Meanwhile, a TDDB detection design is proposed based on the 45nm process, which is suitable for large scale integration of the memory circuit. And the operation of the detection circuit is analyzed based on the BTI (Bias Temperature Instability) effect. Experimental results show that sense amplifiers are more susceptible to time dependent dielectric breakdown than word-line drivers in DRAM. The proposed TDDB detection design can completely meet the maximum fault coverage rate with good robustness to BTI, and it will send out an alarm signal when TDDB happens in the sense amplifier.

Key words: reliability, time dependent dielectric breakdown, three dimensional integrated circuit, dynamic random access memory, detection

CLC Number: 

  • TN47