基于FPGA实现随机逻辑的混合不确定性故障树分析研究

doi:10.16180/j.cnki.issn1007-7820.2019.04.002

摘要/Abstract

摘要：

文中提出一种基于随机逻辑的故障树分析方法,即使用混合故障树分析(HFTA)来兼顾客观不确定性和主观不确定性。该方法将每个故障树逻辑门转换为其对应的随机逻辑模块,然后在现场可编程门阵列(FPGA)中实现。随后在a截集置信度水平等于0的情况下比较常规方法和本文方法的精度和性能。分析结果表明,相较于常规混合不确定性分析方法,文中提出的方法缩短了分析时间。由于与常规混合方法的顶事件概率累积分布函数基本相容,可以认为新方法与常规混合方法的结果精度基本一致。

关键词: 随机逻辑, 现场可编程门阵列, 故障树分析, 概率分布, 蒙特卡罗, 电路硬件描述语言

Abstract:

This paper proposed a fault tree analysis method based on stochastic logic,which utilized hybrid fault tree analysis (HFTA) to take into account both objective and subjective uncertainties. In the proposed method, each fault tree gate was translated to its corresponding stochastic logic module and then was implemented on a field programmable gate array (FPGA). The accuracy and performance of the proposed method were compared with the conventional method In the case that the a-clipping confidence level was equal to 0. Because the top event probability cumulative distribution function is basically compatible with the conventional hybrid method,it can be considered that the accuracy of the new method results and the conventional hybrid method is basically the same.

Key words: stochastic logic, field programmable gate arrays, FTA, probability distributions, monte carlo method, VHDL

中图分类号:

TP30

李孟凡,邹子豪,舒凡娣. 基于FPGA实现随机逻辑的混合不确定性故障树分析研究[J]. 电子科技, 2019, 32(4): 6-10.

LI Mengfan,ZOU Zihao,SHU Fandi. Research on Fault Tree Analysis Method for Hybrid Uncertainties Using Stochastic Logic Implemented on Field-programmable Gate Arrays[J]. Electronic Science and Technology, 2019, 32(4): 6-10.

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仿真类型	顶事件概率均值	均方误差	误差率	在95%和 5%分位点上的误差率	计算时间
常规方法仿真	4.4298E-02	1.15E-05	4.81%	1.17%, 0.8%	0.842 μs
本文方法仿真	4.3177E-02	/	/	/	7.792 ns

基本事件ID	基本事件概率/可能性分布
X₁	(3.754E-6,3.754E-5,3.754E-4)
X₂	对数正态分布β=8.0E-4,α=6.678E-1
X₃	(2.666E-4,8.0E-4,2.4E-3)
X₄	对数正态分布β=8.0E-4,α=6.678E-1
X₅	对数正态分布β=8.0E-4,α=6.678E-1