基于FPGA的PTP时间同步技术实现

doi:10.16180/j.cnki.issn1007-7820.2019.11.009

摘要/Abstract

摘要：

针对现有PTP时间同步技术实现方案系统复杂、结构冗余以及成本高的问题,文中提出了一种基于FPGA的PTP时间同步技术实现方案。通过在确立主从关系的FPGA系统之间交互四种报文的方式,从系统在数据链路层截取Sync和Delay_req报文的时间戳,并计算主从系统之间的链路延迟和时间偏移量,对本地时钟进行补偿以实现时间同步。文中采用Xilinx公司提供的ChipScope Pro工具做板级验证,抓取主从系统的时间信息,并测试同步精度和成功率。实验结果表明,所设计的系统在时间同步精度上可以达到纳秒级,同步的成功率基本维持在99.99%。

关键词: PTP, 时间同步, 延迟, 偏移量, 同步精度, 成功率

Abstract:

Aiming the problem of complexity, redundant structure and high cost in the implementation scheme of the existing PTP technology, this paper proposed an implementation scheme of PTP time synchronization technology based on FPGA. The timestamps of Sync and Delay_req messages were intercepted in the data link layer by establishing four kinds of messages between systems of FPGA which had the master-slave structure. Then, slave system calculated the link delay and time offset according to timestamps. Finally, the local clock of slave system was compensated to achieve the goal of time synchronization. ChipScope Pro tool provided by Xilinx was used to capture the time information of master and slave system, as well as to test time accuracy and success rate for board level verification in this study. The experimental results showed that the designed system could reach nanosecond accuracy in time synchronization, and the success rate of synchronization was basically maintained at 99.99%.

Key words: PTP, timesynchronization, delay, offset, synchronizationprecision, success rate

中图分类号:

TN91

房晓瑜,王京梅,晏子杰,陈卓. 基于FPGA的PTP时间同步技术实现[J]. 电子科技, 2019, 32(11): 43-47.

FANG Xiaoyu,WANG Jingmei,YAN Zijie,CHEN Zhuo. Implementation of PTP Time Synchronization Technology Based on FPGA[J]. Electronic Science and Technology, 2019, 32(11): 43-47.

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序号	同步次数/次	捕获次数/次	成功率
1	20 000	19 998	99.990 0%
2	40 000	39 997	99.992 5%
3	60 000	59 995	99.991 7%
4	80 000	79 991	99.988 8%