关键词: FPGA, VHDL, ALU, IP软核

Abstract:

A method for designing a 32-bit ALU based on the programmable logic device FPGA and VHDL language is introduced. The ALU is designed by modules. It is composed of control module, add-sub module, multiplication module and division module. The ALU can perform 32-bit signed and unsigned binary digit's mathematic operations. It can also perform nine kinds of logic and six kinds of arithmetic operation. In addition, it can exchange high-byte and low-byte's data. Its simulation in QuartusII shows that the ALU designed is correct and can be used for testing directly.

Key words: FPGA, VHDL, ALU, IP core