›› 2012, Vol. 25 ›› Issue (4): 57-.

• 论文 • 上一篇    下一篇

基于CMOS多功能数字芯片的ESD保护电路设计

周子昂,姚遥,徐坤,张利红   

  1. (周口师范学院 物理与电子工程系,河南 周口 466001)
  • 出版日期:2012-04-15 发布日期:2012-04-17
  • 作者简介:周子昂(1981—),男,硕士。研究方向:电路与系统,数字集成电路设计。
  • 基金资助:

    周口师范学院青年科研基金资助项目(zknuqn201043A)

A Design of ESD Protection Circuit for Multi-functional Digital Chip in CMOS Process

 ZHOU Zi-Ang, YAO Yao, XU Kun, ZHANG Li-Hong   

  1. (Department of Physics and Electronics Engineering,Zhoukou Normal University,Zhoukou 466001,China)
  • Online:2012-04-15 Published:2012-04-17

摘要:

基于CSMC 2P2M 0.6 μm CMOS工艺设计了一种ESD保护电路。整体电路采用Hspice和CSMC 2P2M 的0.6 μm CMOS工艺的工艺库(06mixddct02v24)仿真,基于CSMC 2P2M 0.6 μm CMOS工艺完成版图设计,并在一款多功能数字芯片上使用,版图面积为1 mm×1 mm,参与MPW(多项目晶圆)计划流片,流片测试结果表明,芯片满足设计目标。

关键词: CMOS工艺, ESD保护电路, 版图设计

Abstract:

An ESD protection circuit is designed based on CSMC 2P2M 0.6 μm CMOS process.The circuit is simulated using Hspice and the process of the CSMC 2P2M 0.6 μm CMOS (06 mixddct02v24),the layout is based on CSMC 2P2M 0.6 μm CMOS and is used in a Multi-functional Digital Chip.The chip area is 1 mm×1 mm.The design has been successfully implemented by participating in the plan of the Multi Project Wafer.Measurements indicate that the wafer achieves the expected goals.

Key words: CMOS Process;ESD protection circuit;layout design

中图分类号: 

  • TN32