关键词: FPGA, BIT, 测试性

Abstract:

The design principle of telemetry signal processor is introduced.A method by introducing an additional hardware circuit and taking advantage of the rest logic resource in FPGA is given to enhance the fault detection rate and test coverage of telemetry signal processor hanging on the aerobat.BIT of telemetry signal processor is realized by designing self-checking module based on this method.

Key words: FPGA;BIT;testability