›› 2015, Vol. 28 ›› Issue (8): 24-.

• 论文 • 上一篇    下一篇

基于FPGA的高阶FIR滤波器设计

焦淑红,智扬   

  1. (哈尔滨工程大学 信息与通信工程学院,黑龙江 哈尔滨 150001)
  • 出版日期:2015-08-15 发布日期:2015-08-15
  • 作者简介:焦淑红(1966—),女,博士,教授,博士生导师。研究方向:数字图像处理。E-mail:jiaoshuhong@sina.com。智扬(1989—),男,硕士研究生。研究方向:宽带信号处理。

Design of High Order FIR Filter Design Based on FPGA

JIAO Shuhong,ZHI Yang   

  1. (College of Information and Communication Engineering,Harbin Engineering University,Harbin 150001,China)
  • Online:2015-08-15 Published:2015-08-15

摘要:

对于高阶FIR滤波器,由于运算量较大,采用软件等方式无法达到实时处理的要求。文中提出了采用FPGA实现快速卷积结构的高阶FIR滤波器,推导出将大点数FFT分解为二维FFT变换的公式。根据上述理论在采用Verilog HDL语言设计了基于一维转二维FFT的快速卷积结构高阶FIR滤波器。实验表明,该基于FPGA的高阶FIR滤波器具有精度高、速度快、资源消耗少、调试方便、易于集成等优点,并可达到工程实践的要求。

关键词: FPGA, FIR滤波器, 快速卷积, FFT

Abstract:

FIR filter is wildly used in digital signal processing.It is difficult to realize high order FIR filters by using software because of large amount of computing.This paper introduces the use of FPGA to implement high order FIR filter with fast convolution structure and deducts the formula of large point FFT decomposition to two-dimensional FFT.According to the above theory,a high order FIR filter with fast convolution structure is designed based on the one-dimensional to two-dimensional FFT using Verilog HDL language.The experimental results show that the high order FIR filter based on FPGA meets the requirements of practice in engineering with high accuracy and speed,low consumption of resources as well as easy adjustment and integration.

Key words: FPGA;FIR filter;fast convolution;FFT

中图分类号: 

  • TN713+.1