关键词: 线阵CCD, 复杂可编程逻辑器件, Verilog HDL

Abstract:

A high resolution linear array CCD signal acquisition system based on complex programmable logic device is designed in this paper.The Verilog hardware description language is employed in the CPLD control module and the logic unit of the program design.The special features of the A/D chip in the CCD are used to realize output signal processing and analog digital conversion.Real-time transmission is achieved through the USB2.0 interface.The design method of CPLD has the characteristics of high accuracy,fast sampling rate,strong anti-interference and stable output signal.The simulation results show that the overall performance of the system is good stable under different working conditions with noise within the range of the system and correct display of the CCD data by the computer.

Key words: linear CCD;complex programmable logic device;Verilog HDL