关键词: UART, FPGA, Verilog HDL

Abstract:

In order to realize the communication between FPGA and PC, we design and implement a UART controller based on the Field Programmable Gates Array (FPGA). In the Xilinx ISE 11 development platform, we use the Verilog HDL language and its own IP CORE to implement the receiving module, sending module and precise baud rate clock module. Finally we use XC2VP30 device to verify the function of the UART. The results show that the UART module is stable and reliable.

Key words: UART, FPGA, Verilog HDL