›› 2011, Vol. 24 ›› Issue (6): 127-.

• 论文 • 上一篇    下一篇

FPGA控制下面阵CCD时序发生器设计及硬件实现

朱冰莲,杜培强,运明华   

  1. (重庆大学 通信工程学院,重庆 400044)
  • 出版日期:2011-06-15 发布日期:2011-06-14
  • 作者简介:朱冰莲(1959—),女,教授。研究方向:信号处理。杜培强(1984—),男,硕士研究生。研究方向:现代信号与信息处理。

Design of a Driving Schedule Generator for the Area Array CCD Controlled by FPGA

ZHU Binglian, DU Peiqiang, YUN Minghua   

  1. (College of Communication Engineering,Chongqing University,Chongqing 400044,China)
  • Online:2011-06-15 Published:2011-06-14

摘要:

在分析Sony公司ICX098BQ面阵CCD图像传感器驱动时序的基础上,对可调节曝光时间的CCD时序发生器及其硬件电路进行设计。选用FPGA器件作为硬件设计平台,使用VHDL语言对时序关系进行了硬件描述,采用Quartus II 8.0对所设计的时序发生器进行了功能仿真,并以Altera公司的可编程逻辑器件为核心进行硬件适配。实际测试表明,所设计的驱动时序发生器能够满足面阵CCD 的驱动要求,实现了设计目的。

关键词: 面阵CCD;FPGA;时序发生器

Abstract:

In this paper,driving timing of Sony ICX098BQ area array CCD image sensor is analyzed.CCD timing generator with adjustable exposure time and its hardware circuit are designed.FPGA is chosen as the hardware design platform,and schedule generator is described with VHDL.The designed generator successfully fulfills function simulation with Quartus II 8.0 and fit into FPGA made by Altera.Actual tests show that driving schedule generator meets the driving requirement of area array CCD and achieves the design objectives.

Key words: area array CCD;FPGA;driving schedule generator

中图分类号: 

  • TN79