›› 2012, Vol. 25 ›› Issue (5): 137-.

• Articles • Previous Articles     Next Articles

Design and Realization of Frame Synchronization Used in G3-PLC

 LI Shu-Qing, FENG Heng   

  1. (School of Electrical Engineering,Xidian University,Xi'an 710071,China)
  • Online:2012-05-15 Published:2012-05-24

Abstract:

The large number of subcarriers in G3-PLC system causes too many samples of preamble in time domain.Traditional synchronization algorithm based on cross-correlation needs large operations and is hard to realize when used in this system.According to the characteristic of preamble in G3-PLC,a new synchronization algorithm is put forward,which reduces the operation by two orders in magnitude with slight performance degradation.The algorithm is realized in FPGA.

Key words: G3-PLC;synchronization;FPGA

CLC Number: 

  • TN915.04