›› 2012, Vol. 25 ›› Issue (5): 38-.
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PIAO Wei-Jie, CHENG Hao
Online:
Published:
Abstract:
As the clock frequency becoming more and more high,the PCB design has become more and more complex,and signal Integrity simulation becomes more and more important.In this paper,according to the source synchronization of some basic issues in the Cadence simulation environment,simulate the source synchronous timing,and get simulation process and results.
Key words: SI;source synchronous timing;Cadence
CLC Number:
PIAO Wei-Jie, CHENG Hao. Source Synchronous Timing Simulation Based on the Cadence[J]., 2012, 25(5): 38-.
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https://journal.xidian.edu.cn/dzkj/EN/Y2012/V25/I5/38
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