Journal of Xidian University ›› 2022, Vol. 49 ›› Issue (6): 42-50.doi: 10.19665/j.issn1001-2400.2022.06.006

• Information and Communications Engineering • Previous Articles     Next Articles

Multi-data mixed FFT processing optimization method

HONG Qinzhi1,2(),WANG Zhijun3(),GUO Yifan1,2(),LIANG Liping3()   

  1. 1. Institute of Microelectronics of The Chinese Academy of Sciences,Beijing 100029,China
    2. College of Integrated Circuits,University of Chinese Academy of Sciences,Beijing 100049,China
    3. College of Integrated Circuits,Beijing University of Posts and Telecommunications,Beijing 100876,China
  • Received:2021-12-10 Online:2022-12-20 Published:2023-02-09

Abstract:

A new computational method is proposed to support multiple FFT processing simultaneously.The method can effectively solve the performance loss of memory-based architecture FFT processors due to the computational path pipeline bubbles and the unbalanced throughput of different FFT points.A deeply pipelined WFTA algorithm-based configurable butterfly unit and a new multiple block floating-point processing unit are designed,which can support high precision computing and include one radix-9/two radix-8/three radix-5/four radix-4/five radix-3 in parallel.Based on the proposed method,a multi-mode high performance FFT processor for 4G/5G is implemented,which can support 60 modes including 64~4 096-point FFT/iFFT and 12~3 240-point DFT/iDFT computing.The processor is implemented based on 55 nm CMOS technology,with a 1.46 mm2 layout,supports 1.5GS/s in a single mode and 2.2 GS/s in a mixed mode at 500MHz.It is shown that the proposed processor can support more points and has a better performance than previous designs.

Key words: FFT processor, high-performance, multi-mode, 5G

CLC Number: 

  • TN432