星上Clos交换网络的逆向调度算法

doi:10.3969/j.issn.1001-2400.2013.04.016

Abstract

Abstract:

For the special requirements of the on-board switching for satellite communication on hardware complexity and matching efficiency, the reverse dispatching scheme for MSM Clos-network switches is proposed. Unlike the previous dispatching schemes which perform matching according to the order of modules, the reverse dispatching scheme first buffers requests, and then performs internal matching in central modules instead. Then the results of the matching are used for the cell-sending in input modules. Different steps of the whole dispatching scheme are isolated in this dispatching scheme, which means that the performance of a step does not depend on the result of the preceding one. Then the whole dispatching scheme can be performed in a pipelined manner. Simulation results show that the reverse dispatching scheme can improve the dispatching efficiency without additional hardware overhead and achieve a low end-to-end delay.

Key words: satellite communication, on-board switching, three-stage Clos-network, dispatching scheme, pipeline

CLC Number:

TP393

ZHANG Maosen;QIU Zhiliang;GAO Ya;LI Jun. Reverse dispatching scheme for satellite Clos-network switches[J].J4, 2013, 40(4): 96-101.

References

［1］ Park U, Kim H W, Oh D S, et al. A Dynamic Bandwidth Allocation Scheme for a Multi-spot-beam Satellite System［J］. ETRI, 2012, 34(4): 613-616.
［2］ Fang R J F. Broadband IP Transmission over SPACEWAY ^R Satellite with On-Board Processing and Switching［C］//Proc GLOBECOM. Piscataway: IEEE, 2011: 1-5.
［3］杭州华三通信技术有限公司. 面向数据中心的新一代交换架构［J］. 电信工程技术与标准化, 2010, 23(10): 67-71.
H3C. New Generation Switching Architecture Oriented to Data Center［J］.Telecom Engineering Technics and Standardization, 2010, 23(10): 67-71.
［4］ Glick M. Optical Interconnects in Next Generation Data Centers: an End to End View［C］//Proc HOTI. Stanford: IEEE, 2008: 178-181.
［5］ Clos C. A Study of Nonblocking Switching Networks［J］. Bell System Technical Journal, 1953, 32(2): 406-424.
［6］ Chao H J, Zhigang J, Liew S Y. Matching Algorithms for Three-stage Bufferless Clos Network Switches［J］. IEEE Communications Magazine, 2003, 41(10): 46-54.
［7］ Dong Z, Roberto R C, Eiji O. Memory-memory-memory Clos-network Packet Switches with in-sequence Service［C］//Proc HPSR. Cartagena: IEEE, 2011: 121-125.
［8］ Eiji O, Zhigang J, Roberto R C, et al. Concurrent Round-robin-based Dispatching Schemes for Clos-network Switches［J］. IEEE/ACM Trans on Networking, 2002, 10(6): 830-844.
［9］ Lee T T, Lam C H. Path Switching—a Quasi-static Routing Scheme for Large-scale ATM Packet Switches［J］. JSAC, 1997, 15(5): 914-924.
［10］ Chao J. Saturn: a Terabit Packet Switch Using Dual Round Robin［J］. IEEE Communications Magazine, 2000, 38(12): 78-84.
［11］ McKeown N. The iSLIP Scheduling Algorithm for Input-queued Switches［J］. IEEE/ACM Trans on Networking, 1999, 7(2): 188-201.

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Reverse dispatching scheme for satellite Clos-network switches

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